TFP501

www.ti.com

SLDS127C

– JULY 2001 – REVISED JULY 2011

PanelBus

™ HDCP Digital Receiver

Check for Samples: TFP501

1

FEATURES

DESCRIPTION

The TFP501 is a Texas Instruments PanelBus flat

2

•

Supports Pixel Rates Up to 165 MHz (including

panel display product, part of a comprehensive family

1080p and WUXGA at 60Hz)

of end-to-end DVI 1.0-compliant solutions. Targeted

•

Digital Visual Interface (DVI) and

primarily at desktop LCD monitors, DLP and LCD

High-Bandwidth Digital Content Proataection

projectors,

and

digital

TVs,

the

TFP501

finds

applications in any design requiring high-speed digital

•

Encrypted External HDCP Device Key Storage

interface with the additional benefit of an extremely

for Exceptional Security and Ease of

robust and innovative encryption scheme for digital

Implementation

content protection.

•

True-Color, 24 Bits/Pixel, 48-bit Dual Pixel

The TFP501 supports display resolutions up to 1080p

Output Mode, 16.7M Colors at 1 or 2 Pixels Per

and WUXGA in 24-bit true color pixel format. The

Clock

TFP501 offers design flexibility to drive one or two

•

Laser Trimmed (50-

Ω) Input Stage for Optimum

pixels per clock, supports TFT or DSTN panels, and

Fixed Impedance Matching

provides an option for time staggered pixel outputs

•

Skew Tolerant up to One Pixel Clock Cycle

for reduced ground-bounce.

(High Clock and Data Jitter Tolerance)

PowerPAD advanced packaging technology results in

•

4x Over-Sampling for Reduced Bit-Error Rates

best-of-class

power

dissipation,

footprint,

and

and Better Performance Over Longer Cables

ultra-low ground inductance.

•

Reduced Power Consumption From 1.8-V Core

The TFP501 combines PanelBus circuit innovation

and unique implementation for HDCP key protection

•

Reduced Ground-Bounce Using Time

with TI's advanced 0.18

µm EPIC-5 CMOS process

Staggered Pixel Outputs

technology to achieve a completely secure, reliable,

•

Lowest Noise and Best Power Dissipation

low-powered, low noise, high-speed digital interface

Using TI 100-pin TQFP PowerPAD

™Packaging

solution.

•

Advanced Technology Using TI's 0.18-mm

EPIC-5

™ CMOS Process

•

Supports Hot Plug Detection

(1)

The digital visual interface (DVI) specification is an industry

standard developed by the digital display working group

(DDWG) for high-speed digital connection to digital displays.

The high-bandwidth digital content protection system (HDCP)

is an industry standard for protecting DVI outputs from being

copied. HDCP was developed by Intel Corporation and is

licensed by the Digital Content Protection, LLC. The TFP501

is compliant to the DVI Rev. 1.0 and HDCP Rev. 1.0

specifications.

(2)

The TFP501 has an internal voltage regulator that provides

the 1.8 V core power supply from the externally supplied 3.3

V supplies.

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

PanelBus, PowerPAD, EPIC-5 are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright

© 2001–2011, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.