expected, or where strong electric or magnetic fields may

be present. The lowest ambient noise region of the board

should be chosen for device location.

12. If device socketing is desired, a low-profile, low mutual

capacitance, low resistance, forced-insertion socket type

should be employed.

13. Wire-wrapping should not be employed, even in an

evaluation set-up.

14. Capacitors used for the loop filter, the Timing Extractor

filter, and all bypassing purposes should be ultra-stable

monolithic ceramic capacitors or equivalent timing quality

capacitors. Silver-mica capacitors should be employed for

values 1000 pF and below.

15. In order to achieve very close proximity of passive

components to the DP8459 device, it is acceptable to

have axial-lead resistors standing upright; however, the

shorter component lead should be connected to the

device pins to obviate noise induction into sensitive

nodes.

7.0 Application Support

It is National Semiconductor’s policy to offer and maintain a

high level of direct Customer support on all of its mass storage

products. National’s experience in supporting the disk data

memory industry has allowed the DP8459 to be designed to

directly address the unique challenges of serial data

synchronization within the areas of magnetic and optical media

data storage and local area networks, facilitating straightfor-

ward use of the device in a diverse range of applications. In the

event that questions arise regarding the use of the DP8459 or

any other associated NSC mass storage device, the Customer

is encouraged to contact the Logic Applications Group or Logic

Marketing Group at

National Semiconductor Corporation

2900 Semiconductor Drive

P.O. Box 58090

Santa Clara, CA 95052-8090

Telephone (408) 721-5000

FIGURE 25. Zero Phase Start Lock Acquistion Sequence and Start of Preamble Detection; Frequency Lock Employed,

4T Pattern

TL/F/9322-26

PrintDate=1996/07/31 PrintTime=11:06:14 ds009322 Rev. No. 1

Proof

28

28

http:\\www.national.com