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WM8993 датащи(PDF) 76 Page - Wolfson Microelectronics plc |
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WM8993 датащи(HTML) 76 Page - Wolfson Microelectronics plc |
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76 / 229 page ![]() WM8993 Production Data w PD, November 2010, Rev 4.0 76 OUTPUT SIGNAL PATH VOLUME CONTROL There are six output PGAs - MIXOUTLVOL, MIXOUTRVOL, HPOUT1LVOL, HPOUT1RVOL, SPKLVOL and SPKRVOL. Each can be independently controlled, with MIXOUTLVOL and MIXOUTRVOL providing volume control to both the earpiece and line drivers, HPOUT1LVOL and HPOUT1RVOL to the headphone driver, and SPKLVOL and SPKRVOL to the speaker drivers. The volume control of each of these output PGAs can be adjusted over a wide range of values. To minimise pop noise, it is recommended that only the MIXOUTLVOL, MIXOUTRVOL, HPOUT1LVOL, HPOUT1RVOL, SPKLVOL and SPKRVOL are modified while the output signal path is active. Other gain controls are provided in the signal paths to provide scaling of signals from different sources, and to prevent clipping when multiple signals are mixed. However, to prevent pop noise, it is recommended that those other gain controls should not be modified while the signal path is active. To prevent "zipper noise", a zero-cross function is provided on the output PGAs. When this feature is enabled, volume updates will not take place until a zero-crossing is detected. In the case of a long period without zero-crossings, a timeout function is provided. When the zero-cross function is enabled, the volume will update after the timeout period if no earlier zero-cross has occurred. The timeout clock is enabled using TOCLK_ENA; the timeout period is set by TOCLK_RATE. See “Clocking and Sample Rates” for more information on these fields. The mixer output PGA controls are shown in Table 47. The MIXOUT_VU bits control the loading of the output mixer PGA volume data. When MIXOUT_VU is set to 0, the volume control data will be loaded into the respective control register, but will not actually change the gain setting. The output mixer PGA volume settings are both updated when a 1 is written to either MIXOUT_VU bit. This makes it possible to update the gain of both output paths simultaneously. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R32 (20h) Left OPGA Volume 8 MIXOUT_VU N/A Mixer Output PGA Volume Update Writing a 1 to this bit will update MIXOUTLVOL and MIXOUTRVOL volumes simultaneously. 7 MIXOUTL_ZC 0b MIXOUTLVOL (Left Mixer Output PGA) Zero Cross Enable 0 = Zero cross disabled 1 = Zero cross enabled 6 MIXOUTL_MUTE_N 1b MIXOUTLVOL (Left Mixer Output PGA) Mute 0 = Mute 1 = Un-mute 5:0 MIXOUTL_VOL [5:0] 39h (0dB) MIXOUTLVOL (Left Mixer Output PGA) Volume -57dB to +6dB in 1dB steps (See Table 50 for output PGA volume control range) R33 (21h) Right OPGA Volume 8 MIXOUT_VU N/A Mixer Output PGA Volume Update Writing a 1 to this bit will update MIXOUTLVOL and MIXOUTRVOL volumes simultaneously. 7 MIXOUTR_ZC 0b MIXOUTRVOL (Right Mixer Output PGA) Zero Cross Enable 0 = Zero cross disabled 1 = Zero cross enabled 6 MIXOUTR_MUTE_N 1b MIXOUTLVOL (Right Mixer Output PGA) Mute 0 = Mute 1 = Un-mute 5:0 MIXOUTR_VOL [5:0] 39h (0dB) MIXOUTRVOL (Right Mixer Output PGA) Volume -57dB to +6dB in 1dB steps (See Table 50 for output PGA volume control range) Table 47 Mixer Output PGA (MIXOUTLVOL, MIXOUTRVOL) Control |
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