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WM8993 датащи(PDF) 45 Page - Wolfson Microelectronics plc |
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WM8993 датащи(HTML) 45 Page - Wolfson Microelectronics plc |
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45 / 229 page ![]() Production Data WM8993 w PD, November 2010, Rev 4.0 45 ANALOGUE TO DIGITAL CONVERTER (ADC) The WM8993 uses stereo 24-bit, 128x oversampled sigma-delta ADCs. The use of multi-bit feedback and high oversampling rates reduces the effects of jitter and high frequency noise. An oversample rate of 64x can also be supported - see “Clocking and Sample Rates” for details. The ADC full scale input level is proportional to AVDD1 - see “Electrical Characteristics”. Any input signal greater than full scale may overload the ADC and cause distortion. The ADCs are enabled by the ADCL_ENA and ADCR_ENA register bits. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R2 (02h) Power Management (2) 1 ADCL_ENA 0 Left ADC Enable 0 = ADC disabled 1 = ADC enabled 0 ADCR_ENA 0 Right ADC Enable 0 = ADC disabled 1 = ADC enabled Table 9 ADC Enable Control ADC DIGITAL VOLUME CONTROL The output of the ADCs can be digitally amplified or attenuated over a range from -71.625dB to +17.625dB in 0.375dB steps. The volume of each channel can be controlled separately. The gain for a given eight-bit code X is given by: 0.375 × (X-192) dB for 1 ≤ X ≤ 239; MUTE for X = 0 +17.625dB for 239 ≤ X ≤ 255 The ADC_VU bit controls the loading of digital volume control data. When ADC_VU is set to 0, the ADCL_VOL or ADCR_VOL control data will be loaded into the respective control register, but will not actually change the digital gain setting. Both left and right gain settings are updated when a 1 is written to ADC_VU. This makes it possible to update the gain of both channels simultaneously. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R15 (0Fh) Left ADC Digital Volume 8 ADC_VU N/A ADC Volume Update Writing a 1 to this bit will cause left and right ADC volume to be updated simultaneously 7:0 ADCL_VOL [7:0] 1100_0000 (0dB) Left ADC Digital Volume 00h = MUTE 01h = -71.625dB … (0.375dB steps) EFh = +17.625dB (See Table 11 for volume range) R16 (10h) Right ADC Digital Volume 8 ADC_VU N/A ADC Volume Update Writing a 1 to this bit will cause left and right ADC volume to be updated simultaneously 7:0 ADCR_VOL [7:0] 1100_0000 (0dB) Right ADC Digital Volume 00h = MUTE 01h = -71.625dB … (0.375dB steps) EFh = +17.625dB (See Table 11 for volume range) Table 10 ADC Digital Volume Control |
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