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WM8993 датащи(PDF) 61 Page - Wolfson Microelectronics plc |
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WM8993 датащи(HTML) 61 Page - Wolfson Microelectronics plc |
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61 / 229 page ![]() Production Data WM8993 w PD, November 2010, Rev 4.0 61 DIGITAL TO ANALOGUE CONVERTER (DAC) The WM8993 DACs receive digital input data from the DACDAT pin and via the digital sidetone path. The digital audio data is converted to oversampled bit streams in the on-chip, true 24-bit digital interpolation filters. The bitstream data enters two multi-bit, sigma-delta DACs, which convert them to high quality analogue audio signals. The multi-bit DAC architecture reduces high frequency noise and sensitivity to clock jitter. It also uses a Dynamic Element Matching technique for high linearity and low distortion. The analogue outputs from the DACs can be mixed with analogue line/mic inputs using the line output mixers MIXOUTL / MIXOUTR and the speaker output mixers SPKMIXL / SPKMIXR. The DACs are enabled by the DACL_ENA and DACR_ENA register bits. Note that the CLK_DSP clock must be enabled and present whenever the DACs are enabled. See “Clocking and Sample Rates” for details of this clock. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R3 (03h) Power Management (3) 1 DACL_ENA 0 Left DAC Enable 0 = DAC disabled 1 = DAC enabled 0 DACR_ENA 0 Right DAC Enable 0 = DAC disabled 1 = DAC enabled Table 31 DAC Enable Control DAC DIGITAL VOLUME CONTROL The output level of each DAC can be controlled digitally over a range from -71.625dB to 0dB in 0.375dB steps. The level of attenuation for an eight-bit code X is given by: 0.375 × (X-192) dB for 1 ≤ X ≤ 192; MUTE for X = 0 0dB for 192 ≤ X ≤ 255 The DAC_VU bit controls the loading of digital volume control data. When DAC_VU is set to 0, the DACL_VOL or DACR_VOL control data will be loaded into the respective control register, but will not actually change the digital gain setting. Both left and right gain settings are updated when a 1 is written to DAC_VU. This makes it possible to update the gain of both channels simultaneously. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R11 (0Bh) Left DAC Digital Volume 8 DAC_VU N/A DAC Volume Update Writing a 1 to this bit will cause left and right DAC volume to be updated simultaneously 7:0 DACL_VOL [7:0] 1100_0000 (0dB) Left DAC Digital Volume 00h = MUTE 01h = -71.625dB … (0.375dB steps) C0h = 0dB (See Table 33 for volume range) R12 (0Ch) Right DAC Digital Volume 8 DAC_VU N/A DAC Volume Update Writing a 1 to this bit will cause left and right DAC volume to be updated simultaneously 7:0 DACR_VOL [7:0] 1100_0000 (0dB) Right DAC Digital Volume 00h = MUTE 01h = -71.625dB … (0.375dB steps) C0h = 0dB (See Table 33 for volume range) Table 32 DAC Digital Volume Control |
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