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BCM4354 датащи(PDF) 39 Page - Cypress Semiconductor

номер детали BCM4354
подробное описание детали  Single-Chip 5G Wi-Fi IEEE 802.11ac 2횞2 MAC/ Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver
PDF  192 Pages
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производитель  CYPRESS [Cypress Semiconductor]
домашняя страница  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

BCM4354 датащи(HTML) 39 Page - Cypress Semiconductor

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Bluetooth Power Management Unit
BCM4354 Data Sheet
BROADCOM CONFIDENTIAL
Broadcom®
October 15, 2014 • 4354-DS109-R
Page 38
The timing for the startup sequence is defined in Figure 6.
Figure 6: Startup Signaling Sequence
HostResetX
VDDIO
LPO
BT_GPIO_0
(BT_DEV_WAKE
)
BT_UART_CTS_N
CLK_REQ_OUT
BT_GPIO_1
(BT_HOST_WAKE)
BT_REG_ON
BT_UART_RTS_N
Host I/Os
configured
Host I/Os
unconfigured
BTH I/Os
configured
BTH I/Os
unconfigured
T4
T5
T3
T2
T1
Notes:
 T1 is the time for Host to settle it’s IOs after a reset.
 T2 is the time for Host to drive BT_REG_ON high after the Host IOs are configured.
 T3 is the time for BTH (Bluetooth) device to settle its IOs after a reset and reference clock settling time has elapsed.
 T4 is the time for BTH device to drive BT_UART_RTS_N low after the Host drives BT_UART_CTS_N low. This assumes the BTH device has already
completed initialization.
 T5 is the time for BTH device to drive CLK_REQ_OUT high after BT_REG_ON goes high. Note this pin is used for designs that use an external reference
clock source from the Host. This pin is irrelevant for Crystal reference clock based designs where the BTH device generates it’s own reference clock from
an external crystal connected to it’s oscillator circuit.
 Timing diagram assumes VBAT is present.
Driven
Pulled
BTH device drives this line low
indicating transport is ready
Host side drives
this line low



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