P89C51RC2BASLASH01 datasheet(45/68 Pages) PHILIPS

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Philips Semiconductors

Preliminary data

P89C51RA2/RB2/RC2/RD2xx

80C51 8-bit Flash microcontroller family

8KB/16KB/32KB/64KB ISP/IAP Flash with 512B/512B/512B/1KB RAM

2002 Jul 18

BootROM that is shadowed over a portion of the user code memory

space. A user program simply calls the common entry point with

appropriate parameters in the BootROM to accomplish the desired

operation. BootROM operations include: erase block, program byte,

verify byte, program security bit, etc. The BootROM overlays the

program memory space at the top of the address space from FC00

to FFFF hex, when it is enabled. The BootROM may be turned off so

that the upper 1 kbyte of user program memory is accessible for

execution.

Clock Mode

The clock mode feature sets operating frequency to be 1/12 or 1/6 of

the oscillator frequency. The clock mode configuration bit, FX2, is

located in the Security Block (See Table 8). FX2, when programmed,

will override the SFR clock mode bit (X2) in the CKCON register. If

FX2 is erased, then the SFR bit (X2) may be used to select between

6-clock and 12-clock mode.

Table 8.

CLOCK MODE CONFIG BIT (FX2)

X2 bit in CKCON

DESCRIPTION

erased

12-clock mode (default)

erased

6-clock mode

programmed

6-clock mode

NOTE:

1. Default clock mode after ChipErase is set to SFR selection.

FLASH MEMORY SPACES

Flash User Code Memory Organization

FFFF

C000

8000

4000

2000

0000

PROGRAM

ADDRESS

BOOT ROM

(1 kB)

FFFF

FC00

SU01614

89C51RD2xx

89C51RC2xx

89C51RB2xx

89C51RA2xx

BLOCK 1

BLOCK 0

BLOCK 3

BLOCK 2

BLOCK 5

BLOCK 4

BLOCK 7

BLOCK 6

BLOCK 9

BLOCK 8

BLOCK 11

BLOCK 10

BLOCK 13

BLOCK 12

BLOCK 15

BLOCK 14

Each block is

4 kbytes in size

Figure 40. Flash Memory Configurations

Power-On Reset Code Execution

The P89C51RA2/RB2/RC2/RD2xx contains two special Flash

registers: the BOOT VECTOR and the STATUS BYTE. At the falling

edge of reset, the P89C51RA2/RB2/RC2/RD2xx examines the

contents of the Status Byte. If the Status Byte is set to zero,

power-up execution starts at location 0000H, which is the normal

start address of the user’s application code. When the Status Byte is

set to a value other than zero, the contents of the Boot Vector is

used as the high byte of the execution address and the low byte is

set to 00H. The factory default setting is 0FCH, corresponds to the

address 0FC00H for the factory masked-ROM ISP boot loader. A

custom boot loader can be written with the Boot Vector set to the

custom boot loader.

NOTE:

When erasing the Status Byte or Boot Vector, both

bytes are erased at the same time. It is necessary to reprogram

the Boot Vector after erasing and updating the Status Byte.

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