AD7779 datasheet(33/97 Pages) AD

33 / 97 page

Data Sheet

AD7779

Rev. 0 | Page 33 of 97

BIPOLAR OR UNIPOLAR

AVDD1x – 0.1V

AINx+

AVSSx + 0.1V

VCM

VREF/PGAGAIN

Figure 85.

-∆ ADC Input Signal Configuration, True Differential

BIPOLAR OR UNIPOLAR

AVDD1x – 0.1V

AINx+

AVSSx + 0.1V

VCM

VREF/PGAGAIN

Figure 86.

-∆ ADC Input Signal Configuration, Pseudo Differential

BIPOLAR

AINx+

AVSSx + 0.1V

VREF/PGAGAIN

Figure 87.

-∆ ADC Input Signal Configuration, Single-Ended Bipolar

VREF/PGAGAIN

UNIPOLAR

AINx+

+ 0.1V

Figure 88.

-∆ ADC Input Signal Configuration, Single-Ended Unipolar

The input signal common mode is not limited, but keep the

absolute input signal voltage on any AINx± pin between AVSSx

+ 100 mV and AVDD1x – 100 mV; otherwise, the input signal

linearity degrades and, if the signal voltage exceeds the absolute

maximum signal rating, damages the device.

Figure 89 shows the maximum and minimum voltage common-

mode range at different PGA gains for a maximum differential

input voltage.

1.6500

1.2375

0.8250

0.4125

(AVDD1x + AVSSx)/2

–0.4125

PGA GAIN

–0.8250

–1.2375

–1.6500

TRUE DIFFERENTIAL

PSEUDO DIFFERENTIAL

VREF = 2.5V

AVDD1x = 1.65V

AVSSx = –1.65V

Figure 89. Maximum Common-Mode Voltage Range for a Maximum

Differential Input Signal

The AD7779 provides a common-mode voltage pin (AVDD1x +

AVSSx)/2), VCM, for the single-supply, pseudo differential, or true

differential input configurations.

TRANSFER FUNCTION

The AD7779 can operate with up to a 3.6 V reference, typical at

2.5 V, and converts the differential voltage between the analog

inputs (AINx+ and AINx−) into a digital output. The ADC

converts the voltage difference between the analog input pins

(AINx+ − AINx−) into a digital code on the output. The 24-bit

conversion result is in MSB first, twos complement format, as

shown in Table 15 and Figure 90.

Table 15. Output Codes and Ideal Input Voltages for PGA = 1×

Condition

Analog Input

(AINx+ − AINx−),

VREF = 2.5 V

Digital Output Code,

Twos Complement

(Hex)

FS − 1 LSB

+2.499999702 V

0x7FFFFF

Midscale + 1 LSB

+298 nV

0x000001

Midscale

0 V

0x000000

Midscale − 1 LSB

−298 nV

0xFFFFFF

−FS + 1 LSB

−2.499999702 V

0x800001

−FS

−2.5 V

0x800000

100 ... 000

100 ... 001

100 ... 010

011 ... 101

011 ... 110

011 ... 111

ANALOG INPUT

+FSR – 1.5LSB

+FSR – 1LSB

–FSR + 1LSB

–FSR

–FSR + 0.5LSB

Figure 90. Transfer Function

AD7779 датащи(PDF) 33 Page - Analog Devices

AD7779 датащи(HTML) 33 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97

датащи скачать

ссылки URL