AD7779 datasheet(85/97 Pages) AD

85 / 97 page

Data Sheet

AD7779

Rev. 0 | Page 85 of 97

CHANNEL 7 GAIN MIDDLE BYTE REGISTER

Address: 0x04A, Reset: 0x00, Name: CH7_GAIN_MID_BYTE

Com bined gain regis ter Channel 7

[7:0] CH7_GAIN ALL[15:8] (R/W)

Table 117. Bit Descriptions for CH7_GAIN_MID_BYTE

Bits

Bit Name

Settings

Description

Reset

Access

[7:0]

CH7_GAIN ALL[15:8]

Combined Gain Register Channel 7

0x0

R/W

CHANNEL 7 GAIN LOWER BYTE REGISTER

Address: 0x04B, Reset: 0x00, Name: CH7_GAIN_LOWER_BYTE

Com bined gain regis ter Channel 7

[7:0] CH7_GAIN ALL[7:0] (R/W)

Table 118. Bit Descriptions for CH7_GAIN_LOWER_BYTE

Bits

Bit Name

Settings

Description

Reset

Access

[7:0]

CH7_GAIN ALL[7:0]

Combined Gain Register Channel 7

0x0

R/W

CHANNEL 0 STATUS REGISTER

Address: 0x04C, Reset: 0x00, Name: CH0_ERR_REG

Channel 0 - Reference detect error

AIN0- undervoltage error

AIN0+ overvoltage error

AIN0- overvoltage error

AIN0+ undervoltage error

[7:5] RESERVED

[0] CH0_ERR_REF_DET (R)

[4] CH0_ERR_AINM_UV (R)

[1] CH0_ERR_AINP_OV (R)

[3] CH0_ERR_AINM_OV (R)

[2] CH0_ERR_AINP_UV (R)

Table 119. Bit Descriptions for CH0_ERR_REG

Bits

Bit Name

Settings

Description

Reset

Access

[7:5]

RESERVED

Reserved

0x0

R/W

CH0_ERR_AINM_UV

Channel 0—AIN0− Undervoltage Error

0x0

CH0_ERR_AINM_OV

Channel 0—AIN0− Overvoltage Error

0x0

CH0_ERR_AINP_UV

Channel 0—AIN0+ Undervoltage Error

0x0

CH0_ERR_AINP_OV

Channel 0—AIN0+ Overvoltage Error

0x0

CH0_ERR_REF_DET

Channel 0—Reference Detect Error

0x0

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