RF430CL331HIPWR datasheet(33/60 Pages) TI1

33 / 60 page

1. Select, Read,

Write Type 4

command sent

to PICC

2. PICC

prepares

registers and

issues an

interrupt to host

controller

PICC starts

internal timer

(defaults to

55 ms)

3. Host controller has 55 ms

to service the interrupt

Host controller has not

serviced the interrupt

(Host response register Bit

0 not set)

I2C_READY

I2C_SIGNAL

4. PICC formats a

S(WTX) request

(see SWTX register)

and sends it over RF

5. Host controller has

this time to service the

interrupt

6. After this point,

PCD/Mobile either

sends a NACK

(which will not be

handled) or a

Deselect

command and

cycles the RF field

INTO

Asserted

I2C (possible case)

Activity

0 ms ± First time-out time

Second time-out time

PCD stops listening and

issues a packet.

This time varies from PCD

to PCD.

55 ms

Block Sent

1. PCD ± UpdateBinary Command

Reading out this block

3. Host ± Service Request

Entire Buffer Space (not to scale)

7. Repeats

4. PCD ± Sending more data

2. PICC ± Automatic Acknowledgment

and General Type 4 Interrupt

Block Available

Storing in temp buffer

Concurrent

6. PICC ± Automatic Acknowledgment

and General Type 4 Interrupt

From temp buffer

5. Host ± Finishes reading out block

N (<255 bytes)

RF430CL331H

www.ti.com

SLASE18A – SEPTEMBER 2015 – REVISED NOVEMBER 2015

5.9.5.1

NDEF Write Procedure (Nonblocking) Internal Buffer Handling

Figure 5-16. Write System Flow (Nonblocking)

The main difference in a nonblocking write operation is that when the data packet has been received from

the PCD, the host controller is reading out the packet while the next one is being sent in (see Steps 3 and

4 in Figure 5-16). Data is received into a temporary buffer and when the last packet has been read out,

the data in the temporary buffer is copied into the standard buffer so the data can be accessed by the host

controller.

5.10 RF Command Response Timing Limits

Meeting specification timing is an important part of designing a stable and reliable system. There are

various timing parameters that must be considered in this system, and one of the most important is the RF

command response time.

The RF430CL331H negotiates the maximum allowable FWI timing (frame waiting time integer). This

negotiated setting is the maximum of 8 (NFC Digital Protocol Section A.2, NFC-B Technology, FWIMAX),

giving the time of approximately 77 ms. This is the time that the PCD allows to respond to any command.

The RF430CL331H implements an internal timer monitoring this FWI timing specification. The internal

timer defaults to approximately 55 ms instead of 77 ms due to variations in the internal oscillator

frequency. The 55 ms allows meeting the 77-ms specification across all devices reliably.

Figure 5-17 gives the command response timings. A detailed description follows.

Figure 5-17. Timing Limits

Detailed Description

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