RF430CL331HIPWR datasheet(31/60 Pages) TI1

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Block Available

1. PCD ± Update Binary command

(General Type 4 Request interrupt)

Read This Block

2. Host ± Service Request

Block Available

Entire Buffer Space (not to scale)

Previous block cleared

and new data starts at

buffer_start_index of 0

3. PCD ± Next Update Binary command

Being Received

4. PICC ± General Type 4 Request interrupt

N (<255 bytes)

RF430CL331H

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SLASE18A – SEPTEMBER 2015 – REVISED NOVEMBER 2015

(l) To complete servicing the Update Binary command interrupt, set the Interrupt Serviced field in the

Host Response register.

4. RF430CL331H procedure:

(a) If the custom SW feature was not used, the response is status words SW1 = 90h and SW2 = 00h.

(b) If the custom response feature was used, the response to the PCD is what was set in the Custom

Status Word Response register.

5.9.4.1

NDEF Write Command (Blocking) Internal Buffer Handling

Figure 5-14. Write Buffer Flow (Blocking)

The write with blocking stores the send in data packet until it is read out by the host controller. Once it has

been read out, the next write data packet is stored in the same section of memory. The cycle repeats with

more Update Binary packets.

5.9.5

NDEF or Capability Container Write Procedure (Nonblocking)

This command is different from the blocking operation in that the RF430CL331H automatically responds to

an Update Binary command with a success acknowledgment upon receiving the Update Binary packet.

After the acknowledgment, the PCD starts to send the next Update Binary block. The intent is to increase

throughput by downloading the previous Update Binary packet while the new one is being transmitted into

a separate buffer on the RF430CL331H.

Care must be taken to read out the entire packet before the new one is completely transmitted to the

RF430CL331H. Otherwise, this creates latency that, if not corrected, accumulates to the point where one

Update Binary packet request eventually times out.

To enable write nonblocking mode, set the Automatic ACK On Write field in the General Control register.

For a general flow, see Figure 5-15.

Detailed Description

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