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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MEC1322 датащи(PDF) 181 Page - Microchip Technology |
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MEC1322 датащи(HTML) 181 Page - Microchip Technology |
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181 / 456 page  2014 - 2015 Microchip Technology Inc. DS00001719D-page 181 MEC1322 14.10 Configuration Registers The registers listed in the Configuration Register Summary table are for a single instance of the UART. The addresses of each register listed in this table are defined as a relative offset to the host “Base Address” defined in the Configuration Register Base Address Table. Each Configuration register access through the Host Access Port is via its LDN and its Host Access Port Index. EC access is a relative offset to the EC Base Address. 14.10.1 ACTIVATE REGISTER 300000 1 5 375000 1 4 500000 1 3 750000 1 2 1500000 1 1 FIGURE 14-2: CONFIGURATION REGISTER BASE ADDRESS TABLE Block Instance Instance Number Logical Device Number Host Address Space Base Address UART 0 7 LPC Configuration Port INDEX = 00h UART 0 EC 32-bit internal address space 400F_1F00h TABLE 14-9: CONFIGURATION REGISTER SUMMARY Offset Register Name (Mnemonic) 30h Activate Register F0h Configuration Select Register Offset 30h Bits Description Type Default Reset Event 7:1 Reserved R - - 0 ACTIVATE When this bit is 1, the UART logical device is powered and func- tional. When this bit is 0, the UART logical device is powered down and inactive. R/W 0b RESET TABLE 14-8: UART BAUD RATES USING CLOCK SOURCE 24MHz_Clk (CONTINUED) Desired Baud Rate BAUD_CLOCK_SEL Divisor Used to Generate 16X Clock |
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