MEC1322 datasheet(179/456 Pages) MICROCHIP

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DS00001719D-page 179

MEC1322

14.6

Power, Clocks and Reset

This section defines the Power, Clock, and Reset parameters of the block.

14.6.1

POWER DOMAINS

14.6.2

CLOCK INPUTS

14.6.3

RESETS

14.7

Interrupts

This section defines the Interrupt Sources generated from this block.

14.8

Low Power Modes

The UART may be put into a low power state by the chip’s Power, Clocks, and Reset (PCR) circuitry.

14.9

Description

The UART is compatible with the 16450, the 16450 ACE registers and the 16C550A. The UART performs serial-to-par-

allel conversions on received characters and parallel-to-serial conversions on transmit characters. Two sets of baud

rates are provided. When the 1.8432 MHz source clock is selected, standard baud rates from 50 to 115.2K are available.

When the source clock is 32.26 MHz, baud rates from 126K to 2,016K are available. The character options are program-

mable for 1 start; 1, 1.5 or 2 stop bits; even, odd, sticky or no parity; and prioritized interrupts. The UART contains a

programmable baud rate generator that is capable of dividing the input clock signal by 1 to 65535. The UART is also

TABLE 14-2:

POWER SOURCES

Name

Description

VCC1

This Power Well is used to power the registers and logic in this block.

TABLE 14-3:

CLOCK INPUTS

Name

Description

1.8432MHz_Clk

The UART requires a 1.8432 MHz ± 2% clock input for baud rate

generation.

24MHz_Clk

24 MHz ± 2% clock input. This clock may be enabled to generate the

baud rate, which requires a 1.8432 MHz ± 2% clock input.

TABLE 14-4:

RESET SIGNALS

Name

Description

VCC1_RESET

This reset is asserted when VCC1 is applied.

nSIO_RESET

This is an alternate reset condition, typically asserted when the main

power rail is asserted.

RESET

This reset is determined by the

POWER bit signal. When the power bit

signal is 1, this signal is equal to nSIO_RESET. When the power bit

signal is 0, this signal is equal to VCC1_RESET.

TABLE 14-5:

SYSTEM INTERRUPTS

Source

Description

UART

The UART interrupt event output indicates if an interrupt is pending. See

Table 14-13, “Interrupt Control Table,” on page 186.

TABLE 14-6:

EC INTERRUPTS

Source

Description

UART

The UART interrupt event output indicates if an interrupt is pending. See

Table 14-13, “Interrupt Control Table,” on page 186.

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