MEC1322 datasheet(180/456 Pages) MICROCHIP

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MEC1322

DS00001719D-page 180

 2014 - 2015 Microchip Technology Inc.

capable of supporting the MIDI data rate. Refer to the Configuration Registers for information on disabling, powering

down and changing the base address of the UART. The UART interrupt is enabled by programming OUT2 of the UART

to logic “1.” Because OUT2 is logic “0,” it disables the UART's interrupt. The UART is accessible by both the Host and

the EC.

14.9.1

PROGRAMMABLE BAUD RATE

The Serial Port contains a programmable Baud Rate Generator that is capable of dividing the internal clock source by

any divisor from 1 to 65535. The clock source is either the 1.8432MHz_Clk clock source or the 24MHz_Clk clock source.

The output frequency of the Baud Rate Generator is 16x the Baud rate. Two eight bit latches store the divisor in 16 bit

binary format. These Divisor Latches must be loaded during initialization in order to ensure desired operation of the

Baud Rate Generator. Upon loading either of the Divisor Latches, a 16 bit Baud counter is immediately loaded. This

prevents long counts on initial load. If a 0 is loaded into the BRG registers, the output divides the clock by the number

3. If a 1 is loaded, the output is the inverse of the input oscillator. If a two is loaded, the output is a divide by 2 signal with

a 50% duty cycle. If a 3 or greater is loaded, the output is low for 2 bits and high for the remainder of the count.

The following tables show possible baud rates.

TABLE 14-7:

UART BAUD RATES USING CLOCK SOURCE 1.8432MHz_Clk

Desired Baud Rate

BAUD_CLOCK_SEL

Divisor Used to Generate

16X Clock

2304

1536

110

1047

134.5

857

150

768

300

384

600

192

1200

1800

2000

2400

3600

4800

7200

9600

19200

38400

57600

115200

TABLE 14-8:

UART BAUD RATES USING CLOCK SOURCE 24MHz_Clk

Desired Baud Rate

BAUD_CLOCK_SEL

Divisor Used to Generate

16X Clock

125000

136400

150000

166700

187500

214300

250000

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