 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
GDC21D301A датащи(PDF) 18 Page - Hynix Semiconductor |
|
|
|||||||||||||||||||||||||||||
GDC21D301A датащи(HTML) 18 Page - Hynix Semiconductor |
|
|
18 / 35 page  19 GDC21D301A PID Flag 1 (0x00c) When the GDC21D301A decodes the packet whose PID is activated for decoding, it sets the corresponding bit in PID Flag 1, or 2 register. FIELD BITS DESCRIPTION VALUES DEFAULT P15 ~ P3 15:3 PID flag for PSI_15 ~ PSI_3 P2 2 Auxiliary PID flag P1 1 Audio PID flag P0 0 Video PID flag PID Flag 2(0x00e) These bits indicate the type of the packet which the GDC21D301A is now decoding. FIELD BITS DESCRIPTION VALUES DEFAULT P31 ~ P16 15:0 PID flag for PSI_31 ~ PSI_16 APWM control (0x010) APWM output signal is generated by this value. External VCXO for audio can be controlled by this value and the lip synchronization between video and audio clock. The control of this register is the same as that of VPWM. FIELD BITS DESCRIPTION VALUES DEFAULT APWM 15:0 Audio PWM control 0x0000 to 0xFFFF 0x7FFF APWM 15 8 7 0 P31 P30 P29 P28 P27 P26 P25 P24 P23 P22 P21 P20 P19 P18 P17 P16 15 8 7 0 P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0 15 8 7 0 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
