GDC21D301A datasheet(17/35 Pages) HYNIX

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GDC21D301A

Instruction (0x008)

When error(discontinuity) happens in video packet,

i.e., in case Sec=‘1’, the GDC21D301A inputs

video sequence error code in data output.

In case Aps=‘0’, the GDC21D301A outputs audio

compressed data in parallel mode, and in case

Aps=‘1’, the GDC21D301A outputs the data in

serial mode through AUD_SER_DATA pin.

When Vts is 1, the GDC21D301A inputs PTS and

DTS data before sending them to video packet

according to Pdf flag bit of Interrupt Flag 2

receives data from channel input.

When Ice is 1, the GDC21D301A ignores channel

empty condition(i.e., the GDC21D301A continues

decoding data in channel buffer whether they were

decoded before or not.).

When Stc is 1, the GDC21D301A loads internal

PCR counter to STC5 register, and then this bit is

cleared automatically. In case Lst is 1, the

GDC21D301A loads internal PCR counter with

new value when next PCR value is loaded in the

packet, and then this bit is cleared automatically.

FIELD

BITS

DESCRIPTION

VALUES

DEFAULT

Sec

Sequence_error_code

1=sequence_error_code inserted

Aps

Audio parallel/serial output

0=parallel

1= serial

Vts

Video PTS,DTS output

1=PTS/DTS inserted

Ucb

Update channel buffer

Ice

Ignore channel empty

Stc

load STC5

Lst

load PCR

Den

Global decoding enable

1=decoding enable

Ien

Global Interrupt enable

1=interrupt enable

Round Buffer (0x00a)

When Rpn is 1, write pointer is reached to end

pointer, and the write pointer is changed to

start

pointer(i.e., the GDC21D301A overwrites the

following data).

FIELD

BITS

DESCRIPTION

VALUES

DEFAULT

Rpn

8:0

Round the buffer of the PSI_n

Rp8

Rp4 Rp3 Rp2 Rp1 Rp0

Rp7 Rp6 Rp5

Sec

Vts

Ice

Stc Lst Den Ien

Aps

Ucb

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