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GDC21D301A датащи(PDF) 9 Page - Hynix Semiconductor |
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GDC21D301A датащи(HTML) 9 Page - Hynix Semiconductor |
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9 / 35 page ![]() GDC21D301A Pin Description (continued) NAME PIN TYPE DESCRIPTION VIDEO DECODER INTERFACE \VID_WAIT 95 I Video Wait (active low). This signal indicates that the access of registers in the video decoder is ready. \VID_REQ 96 I Video Compressed Data Request (active low). A video decoder requests video data from the GDC21D301A by using this signal. \VID_STRB 125 O Video Compressed Data Strobe (active low). The signal indicates that the video data in VAD_DATA[7:0] exists. The video decoder should latch the video data on the rising edge of VID_STRB. \VID_DCS 123 O Video Chip Select (active low). This signal activates data transfers between the video decoder and the host processor. Host processor can access the registers of the video decoder. VAD_DATA[7:0] 110,114,115, 116,117,119, 120,122 I/O/Z Video/Audio Decoder Data. Parallel bit stream output of compressed audio, video, and auxiliary data. PTS_DTS_STRB 109 O Video PTS/DTS Strobe (active high). When this signal is asserted High, the GDC21D301A puts PTS (Presentation_Time_Stamp) or DTS (Decoding_Time_Stamp) into VAD_DATA[7:0] bus. BOF_V 99 I Begin of Frame0. On the rising edge of this signal, STC, the counted PCR value, is copied to STC3_reg. AUDIO DECODER INTERFACE \AUD_WAIT 95 I Audio Wait (active low). This signal indicates that the access of registers in the audio decoder is ready. \AUD_REQ 94 I Audio Data Request (active low). An audio decoder requests audio data from the GDC21D301A by using this signal. AUD_SER_DATA 104 O Audio Serial Data. \AUD_STRB 105 O Audio Data Strobe (active low). This signal indicates that audio data on VAD_DATA[7:0] exists. \AUD_STRB signal can be used as the data clock for serial and parallel data transmission. Thus, if output mode is parallel, \AUD_STRB is 1-byte strobe. And if output mode is serial, \AUD_STRB is 1-bit strobe. \AUD_DCS 103 O Audio Select (active low). This signal activates data transfers between the audio decoder and the host processor. Host processor should communicate data with the audio decoder through the GDC21D301A. BOF_A 98 I Begin of Frame1. On the rising edge of this signal, STC, the counted PCR_value, is copied to STC3_reg. |
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