CS4216 datasheet(38/58 Pages) CIRRUS

38 / 58 page

APPENDIX A

This data sheet describes version 1 of the CS4216. Therefore, this appendix is included to describe the

differences between version 0 and version 1. This information is only useful for users that still have

version 0 since version 1 devices will supplant the earlier version. The version number is contained in

the serial data line, bits 29 - 32 on SDOUT in SM1-SM3 and, bits 17 - 20 on CDOUT in SM4. The

version number can also be identified by the revision letter stamped on the top of the actual chip. The

revision letter immediately precedes the data code on the second line of the package marking (See

General Information section of the Crystal Data Book). Version 0 corresponds to chip revision A, and

version 1 corresponds to chip revisions B, and C. The functionally and performance of revisions B

and C are identical. Likewise, future chip revisions (i.e. D, E, F, . . .) may still be version 1 since the

version number only changes if there is a software change to the part.

Functional Differences Between Version 0 (Rev. A) and Version 1 (Revs. B, C)

1. In version 0, serial mode 4 (SM4) does not exist; the SMODE3 pin is a no connect. In version 1 the

SMODE3 pin contains an internal pull-down resistor making this version backwards compatible with

version 0 sockets.

2. SSYNC on version 0 must be ONLY one SCLK period high in SM3 or 2 SCLK periods high in

SM1 and SM2 to indicate the start of a frame. Also, on version 0 in SM1 or SM2, SSYNC must be

EXACTLY one SCLK period high, at the beginning of each word. In version 1, SSYNC can be high

for an arbitrary number of SCLKs beyond the one in SM3 or two in SM1 and SM2. Also in SM1 and

SM2, the one-SCLK-wide SSYNCs at each word are not needed. In version 1, SM3 and SM4, the

codec only looks for a low-to-high edge of SSYNC to start a frame; in SM1 and SM2 a low-to-high

edge of SSYNC, being high for two SCLK periods, starts a frame.

CS4216

DS83F2

CS4216 датащи(PDF) 38 Page - Cirrus Logic