CS4216 datasheet(22/58 Pages) CIRRUS

22 / 58 page

port is used asynchronously to the audio port,

the noise performance may be slightly degraded

due to this asynchronous digital noise.

Since control data does not need to be accessed

each audio frame, an interrupt pin, MF5:INT, is

included in this mode and will go low when

status has changed. The control port serial data

format is illustrated in Figure 14. The control

port uses one of the multifunction pins as a chip

select line, MF4:CCS, that must be low for en-

tering control data. Although only 23 bits

contain useful data on MF2:CDIN, a minimum

of 31 bits must be written. If more than 31 bits

are written without toggling MF4:CCS, only the

first 31 are recognized. MF1:CDOUT contains

status information that is output on the rising

edge of MF3:CCLK. Status information is re-

p ea t ed at t h e e nd of t h e fr am e , bi ts 25

through 30, to allow a simple 8-bit shift and

latch register to store the most important status

information using the rising edge of MF4:CCS at

the latch control (see Figure 17).

Applications of SM4

Figure 15 illustrates one method of using serial

mode 4 wherein a DSP controls the audio serial

port and a microcontroller controls the control

port. Each controller is run independently and

the micro updates the control information only

when needed, or when an interrupt from the

CS4216 occurs.

Figure 16 illustrates the minimum interface to

the CS4216. In this application, the DSP sends

and receives stereo DAC and ADC information.

The CS4216 is configured for 32 bits per frame,

Master sub-mode. The control data resets to all

zeros, which configures the CS4216 as a simple

stereo codec: no gain, no attenuation, line inputs

#1, and not muted.

Figure 17 illustrates how to use all the CS4216

features with a low cost DSP that cannot support

the interrupt rate of SM3. Using SM4 (32 bits

MF4:CCS

MF3:CCLK

10 30

Err

Version

MF2:CDIN

MF1:CDOUT

0 001

Left

A/D Gain

Right

A/D Gain

Sel.

Left

D/A Att.

Right

D/A Att.

Err

00 000 00 0

Figure 14. SM4 - Control Serial Port

SCLK to CLKIN Ratio

Fs (kHz)

BPF

with CLKIN with CLKIN

128

12.288 MHz 11.2896 MHz

48.00

44.10

32.00

29.40

24.00

22.05

19.20

17.64

16.00

14.70

12.00

11.025

9.60

8.82

8.00

7.35

Table 9. SM4-Slave, Fs Select.

CS4216

DS83F2

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