CS4216 datasheet(23/58 Pages) CIRRUS

23 / 58 page

per frame, Master sub-mode) reduces the DSP

interrupts in half since the control data is split

from the audio data. This circuit is comprised of

three independent sections which may individu-

ally be eliminated if not needed.

To load control data into the codec, three

HC597’s are utilized. These are both latches that

store the DSP-sent control data, and shift regis-

ters that shift the data into the codec. The codec

uses an inverted SSYNC signal to copy the

latches to the shift registers every frame. In this

diagram the DSP is assumed to have a data bus

bandwidth of at least 24 bits. If the DSP has less

than 24_bits, the three HC597s must be split into

two addresses. Since the HC597 internal latches

are copied to the shift registers, the latches con-

tinually hold the DSP-sent data; therefore, the

DSP only needs to write data to the latches when

a change is desired.

The second section is comprised of an HC595

shift register and latch that is clocked by an in-

verted SCLK The data shifted into the HC595 is

transferred to the HC595’s latch by the SSYNC

signal. This HC595 captures the 8 bits prior to

the SSYNC signal (which is also MF4:CCS) go-

ing high. As shown in Figure 14, and assuming

the MF4:CCS (SSYNC) signal rises at bit 32,

the 8-bits prior to MF4:CCS rising are a copy of

all the important status bits. This allows one shift

The interrupt pin cannot reliably be used in this

configuration since the interrupt pin is cleared by

reading the control port which occurs asynchro-

Micro-

Controller

Serial

Port

General

Purpose

Port

Pins

IRQ

DSP

SDOUT

SDIN

SSYNC

SCLK

CS4216

MF1:CDOUT

MF2:CDIN

MF4:CCS

MF3:CCLK

RESET

MF8:F3

MF7:F2

MF6:F1

MF5:INT

SM4

VD+

Figure 15. SM4 - Microcontroller Interface

DSP

SDOUT

SDIN

SSYNC

SCLK

CS4216

MF1:CDOUT

MF2:CDIN

MF4:CCS

MF3:CCLK

MF5:INT

SM4

VD+

RESET

MF8:F3

MF7:F2

MF6:F1

Hard Wired or

DIP Switch

selectable

32 BPF

Figure 16. SM4 - Minimum DSP Interface

CS4216

DS83F2

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