AS3658 datasheet(77/158 Pages) AMSCO

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Table 68. Step Down Voltage3 Bit definitions

Addr:02

Step Down Voltage3

These bits control the step down regulator voltage, frequency, clk phase

Bit

Bit Name

Default Access

Description

Table 69. Step down1 high current and DVM definitions

Addr:17

Charge Pump Control

These bits control the step down high current mode and DVM step size

Bit

Bit Name

Default Access

Description

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Revision 1v13

76 - 157

AS3658

Data Sheet Confidential - Detail ed Descri ption-Power Management Functions

5:0

step_down3_v

ROM

R/W

Control the voltage selection for the step down3 DC/DC

converter

000000 0.6 V

…

(LSB=50mV)

111000 – 11111 3.4 V

sd3_frequ

ROM

R/W

Select the step down3 frequency

fclk_int

(1.6MHz to 2.3 MHz)

fclk_int/2 (0.8MHz to 1.15 MHz)

sd3_clkinvert

ROM

R/W

Inverts the input clock of the step down1 converter

3:2

sd1_dvm_time

ROM

R/W

Time step of DVM voltage change of step down1

If voltage of step down1 (step_down1_v) is changed during

operation, voltage is decreased or increased by 25 mV

steps with the following time separation between steps:

0 µsec, immediate change (no DVM)

4 µsec

8 µsec

16 µsec

7:4

sdx_1A_mode

ROM

R/W

Select 1A mode of step down2 (combined operation of SD2

and SD3 with a single coil and up to 1A output current) and/

or controller mode of SD1

1010

1A mode selected Controlled by SD2 The

following pins have to be connected:

VSUPPLY2<->VSUPPLY3, LX2<->LX3, PGND2<-

>PGND3

Stepdown3 is not usable in that mode

1100

External controller mode. LDO DIG1 and current

sink / GPIO CURR1_GPIO1 cannot be used. Set

ldo_dig1_on=0, GPIO1Mode=111b (tristate),

GPIO1Pulls=00b (no pull-up or pull-down)

1101

External controller mode SD1, and 1A mode

controlled by SD2

The following pins have to be connected:

VSUPPLY2<->VSUPPLY3, LX2<->LX3, PGND2<-

>PGND3

Stepdown3 is not usable in that mode

all other codes (0000...1001,1011,1110...1111) normal

mode

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