STM32F101ZC datasheet(111/112 Pages) STMICROELECTRONICS

111 / 112 page

STM32F101xC, STM32F101xD, STM32F101xE

Revision history

Doc ID 14610 Rev 8

111/112

24-Sep-2009

Number of DACs corrected in Table 3: STM32F101xx family.

IDD_VBAT updated in Table 17: Typical and maximum current

consumptions in Stop and Standby modes.

Figure 13: Typical current consumption on VBAT with RTC on vs.

temperature at different VBAT values added.

IEC 1000 standard updated to IEC 61000 and SAE J1752/3 updated to

IEC 61967-2 in Section 5.3.11: EMC characteristics on page 77.

Table 59: DAC characteristics modified.

Small text changes.

19-Apr-2011

Updated footnotes below Table 7: Voltage characteristics on page 36

and Table 8: Current characteristics on page 37

Updated tw min in Table 21: High-speed external user clock

characteristics on page 50

Updated startup time in Table 24: LSE oscillator characteristics (fLSE =

32.768 kHz) on page 53

Updated Table 31: Asynchronous non-multiplexed SRAM/PSRAM/NOR

read timings on page 58

Updated FSMC sync data latency in Figure 25 thru Figure 28

Updated Figure 38: NAND controller waveforms for common memory

write access and Table 40: Switching characteristics for NAND Flash

read and write cycles on page 76

Updated Figure 44: Recommended NRST pin protection

Added Section 5.3.13: I/O current injection characteristics

Updated Section 5.3.13: I/O current injection characteristics

Updated note 2 in Table 51: I2C characteristics on page 87

Updated Figure 45: I2C bus AC waveforms and measurement circuit(1)

Table 66.

Document revision history (continued)

Date

Revision

Changes

STM32F101ZC датащи(PDF) 111 Page - STMicroelectronics