| поискавой системы для электроныых деталей |
|
STM32F101ZC датащи(PDF) 109 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32F101ZC датащи(HTML) 109 Page - STMicroelectronics |
|
109 / 112 page ![]() STM32F101xC, STM32F101xD, STM32F101xE Revision history Doc ID 14610 Rev 8 109/112 30-Mar-2009 5 I/O information clarified on cover page. Number of ADC peripherals corrected in Table 2: STM32F101xC, STM32F101xD and STM32F101xE features and peripheral counts. In Table 5: High-density STM32F101xx pin definitions: – I/O level of pins PF11, PF12, PF13, PF14, PF15, G0, G1 and G15 updated – PB4, PB13, PB14, PB15, PB3/TRACESWO moved from Default column to Remap column. PG14 pin description modified in Table 6: FSMC pin definition. Figure 6: Memory map on page 33 modified. Note modified in Table 14: Maximum current consumption in Run mode, code with data processing running from Flash and Table 16: Maximum current consumption in Sleep mode, code running from Flash or RAM. Figure 14, Figure 15 and Figure 16 show typical curves (titles changed). Table 21: High-speed external user clock characteristics and Table 22: Low-speed user external clock characteristics modified. ACCHSI max values modified in Table 25: HSI oscillator characteristics FSMC configuration modified for Asynchronous waveforms and timings. Notes modified below Figure 21: Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms and Figure 22: Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveforms. tw(NADV) values modified in Table 31: Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings and Table 34: Asynchronous multiplexed NOR/PSRAM write timings. th(Data_NWE) modified in Table 32: Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings. In Table 36: Synchronous multiplexed PSRAM write timings and Table 38: Synchronous non-multiplexed PSRAM write timings: –tv(Data-CLK) renamed as td(CLKL-Data) –td(CLKL-Data) min value removed and max value added –th(CLKL-DV) / th(CLKL-ADV) removed Figure 25: Synchronous multiplexed NOR/PSRAM read timings, Figure 26: Synchronous multiplexed PSRAM write timings and Figure 28: Synchronous non-multiplexed PSRAM write timings modified. Small text changes. Table 66. Document revision history (continued) Date Revision Changes |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |