AM79C972BVCW datasheet(104/130 Pages) AMD

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104

Am79C972

D2_SPT

D2 Support. If this bit is a 1, this

function supports the D2 Power

Management State.

Read only.

D1_SPT

D1 Support. If this bit is a 1, this

function supports the D1 Power

Management State.

Read only.

8-6

RES

Reserved locations. Written as

zeros and read as undefined.

DSI

Device

Specific

Initialization.

When this bit is 1, it indicates that

special initialization of the func-

tion is required (beyond the stan-

dard PCI configuration header)

before the generic class device

driver is able to use it.

Read only.

AUXPS

Auxiliary Power Source. This bit

is only meaningful if bit 15

(D3cold supporting PME) is a 1.

When this bit is also a 1, it indi-

cates that support for PME in

D3cold requires auxiliary power

supplied by the system by way of

a proprietary delivery vehicle.

A 0 in this bit indicates that the

function supplies its own auxiliary

power source.

If the function does not support

PME while in D3cold, (bit15=0)

then this field must always return

Read only.

PME_CLK

PME Clock. When this bit is a 1,

it indicates that the function relies

on the presence of the PCI clock

for PME operation. When this bit

is a 0 it indicates that no PCI

clock is required for the function

to generate PME.

Functions that do not support

PME generation in any state

must return 0 for this field.

Read only.

2-0

PMIS_VER Power

Management

Interface

Specification Version. A value of

001b indicates that this function

complies with the revision 1.0 of

the PCI Power Management In-

terface Specification.

PCI Power Management Control/Status Register

(PMCSR)

Offset 44h

Bit

Name

Description

PME_STATUS PME Status. This bit is set when

the function would normally as-

sert the PME signal independent

of the state of the PME_EN bit.

Writing a 1 to this bit will clear it

and cause the function to stop as-

serting a PME (if enabled). Writ-

ing a 0 has no effect.

If the function supports PME from

D3cold then this bit is sticky and

must be explicitly cleared by the

operating system each time the

operating system is initially load-

ed.

Read/write accessible always.

Sticky bit. This bit is reset by

POR. H_RESET, S_RESET, or

setting the STOP bit has no ef-

fect.

14-13 DATA_SCALE

Data Scale. This two bit read-

only field indicates the scaling

factor to be used when interpret-

ing the value of the Data register.

The value and meaning of this

field will vary depending on the

DATA_SCALE field.

Read only.

12-9

DATA_SEL Data Select. This optional four-bit

field is used to select which data

is reported through the Data reg-

ister and DATA_SCALE field.

Read/write accessible always.

Sticky bit. This bit is reset by

POR. H_RESET, S_RESET, or

setting the STOP bit has no ef-

fect.

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