AM79C972BVCW datasheet(61/130 Pages) AMD

61 / 130 page

Am79C972

padding feature. The pad is placed between the LLC

data field and FCS field in the IEEE 802.3 frame. FCS

is always added if the frame is padded, regardless of

the state of DXMTFCS (CSR15, bit 3) or ADD_FCS

(TMD1, bit 29). The transmit frame will be padded by

bytes with the value of 00H. The default value of

APAD_XMT is 0, which will disable automatic pad gen-

eration after H_RESET.

It is the responsibility of upper layer software to cor-

rectly define the actual length field contained in the

message to correspond to the total number of LLC

Data bytes encapsulated in the frame (length field as

defined in the ISO 8802-3 (IEEE/ANSI 802.3) stan-

dard). The length value contained in the message is not

used by the Am79C972 controller to compute the ac-

tual num ber of pad byte s to be inser t ed . Th e

Am79C972 controller will append pad bytes dependent

on the actual number of bits transmitted onto the net-

work. Once the last data byte of the frame has com-

pleted, prior to appending the FCS, the Am79C972

controller will check to ensure that 544 bits have been

transmitted. If not, pad bytes are added to extend the

frame size to this value, and the FCS is then added.

See Figure 33.

Figure 33.

ISO 8802-3 (IEEE/ANSI 802.3) Data Frame

The 544 bit count is derived from the following:

Minimum frame size (excluding preamble/SFD,

including FCS)

64 bytes

512 bits

Preamble/SFD size 8 bytes

64 bits

FCS size

4 bytes

32 bits

At the point that FCS is to be appended, the transmitted

frame should contain:

Preamble/SFD + (Min Frame Size - FCS)

64 + (512-32) = 544 bits

A minimum length transmit frame from the Am79C972

controller, therefore, will be 576 bits, after the FCS is

appended.

Transmit FCS Generation

Automatic generation and transmission of FCS for a

transmit frame depends on the value of DXMTFCS

(CSR15, bit 3). If DXMTFCS is cleared to 0, the trans-

mitter will generate and append the FCS to the trans-

mitted frame. If the automatic padding feature is

invoked (APAD_XMT is set in CSR4), the FCS will be

appended to frames shorter than 64 bytes by the

Am79C972 controller regardless of the state of DXMT-

FCS or ADD_FCS (TMD1, bit 29). Note that the calcu-

lated FCS is transmitted most significant bit first. The

default value of DXMTFCS is 0 after H_RESET.

ADD_FCS (TMD1, bit 29) allows the automatic gener-

ation and transmission of FCS on a frame-by-frame

basis. DXMTFCS should be set to 1 in this mode. To

generate FCS for a frame, ADD_FCS must be set in all

descriptors of a frame (STP is set to 1). Note that bit 29

of TMD1 has the function of ADD_FCS if SWSTYLE

(BCR20, bits 7-0) is programmed to 0, 2, or 3.

Transmit Exception Conditions

Exception conditions for frame transmission fall into

two distinct categories: those conditions which are the

result of normal network operation, and those which

occur due to abnormal network and/or host related

events.

Normal events which may occur and which are handled

autonomously by the Am79C972 controller include col-

lisions within the slot time with automatic retry. The

Am79C972 controller will ensure that collisions which

occur within 512 bit times from the start of transmission

(including preamble) will be automatically retried with

no host intervention. The transmit FIFO ensures this by

guaranteeing that data contained within the FIFO will

not be overwritten until at least 64 bytes (512 bits) of

preamble plus address, length, and data fields have

been transmitted onto the network without encounter-

ing a collision. Note that if DRTY (CSR15, bit 5) is set

to 1 or if the network interface is operating in full-duplex

mode, no collision handling is required, and any byte of

Preamble

1010....1010

SFD

10101011

Destination

Address

Source

Address

Length

LLC

Data

Pad

FCS

Bytes

46 — 1500

Bytes

Bits

21485C-36

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