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AM79C970A датащи(PDF) 165 Page - Advanced Micro Devices |
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AM79C970A датащи(HTML) 165 Page - Advanced Micro Devices |
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165 / 219 page ![]() P R E L I M I N A R Y AMD 165 Am79C970A preamble plus a valid SFD de- tected, followed by 7 bytes of frame data. This requirement is unvarying, regardless of the ad- dress matching mechanisms in force at the time of reception. (I.e. physical, logical, broadcast or promiscuous). The PCnet-PCI II controller implementation of this counter may not be compatible with the ILACC RPC definition. 15–12 ZEROS This field is reserved. PCnet-PCI II controller will write ZEROs to these locations. 11–0 MCNT Message Byte Count is the length in bytes of the received message, expressed as an un- signed binary integer. MCNT is valid only when ERR is clear and ENP is set. MCNT is written by the PCnet-PCI II controller and cleared by the host. RMD3 Bit Name Description 31–0 RES Reserved locations. Transmit Descriptors When SWSTYLE (BCR20, bits 7–0) is set to ZERO, the software structures are defined to be 16 bits wide, and transmit descriptors, (CXDA = Current Transmit De- scriptor Address), are as shown in Table 43. When SWSTYLE (BCR 20, bits 7–0) is set to ONE or TWO, the software structures are defined to be 32 bits wide, and transmit descriptors, (CXDA = Current Trans- mit Descriptor Address), are as shown in Table 44. When SWSTYLE (BCR 20, bits 7–0) is set to THREE, then the software structures are defined to be 32 bits wide, and transmit descriptors, (CXDA = Current Trans- mit Descriptor Address), are as shown in Table 45. Table 43. Transmit Descriptor (SWSTYLE = 0) Address 15 14 13 12 11 10 9 8 7–0 CXDA+00h TBADR[15:0] CXDA+02h OWN ERR ADD_/ MORE ONE DEF STP ENP TBADR[23:16] NO_ / FCS LTINT CXDA+04h 1 1 1 1 BCNT CXDA+06h BUFF UFLO EX LCOL LCAR RTRY TDR DEF Table 44. Transmit Descriptor (SWSTYLE = 1,2) Address 31 30 29 28 27 26 25 24 23 22–16 15–12 11–4 3–0 CXDA+00h TBADR[31:0] CXDA+04h OWN ERR ADD_/ MORE ONE DEF STP ENP BPE RES 1111 BCNT NO_ / FCS LTINT CXDA+08h BUFF UFLO EX LCOL LCAR RTRY TDR RES TRC DEF CXDA+0Ch RESERVED Table 45. Transmit Descriptor (SWSTYLE = 3) Address 31 30 29 28 27 26 25 24 23 22–16 15–12 11–4 3–0 CXDA+00h BUFF UFLO EX LCOL LCAR RTRY TDR RES TRC DEF CXDA+04h OWN ERR ADD_/ MORE ONE DEF STP ENP BPE RES 1111 BCNT NO_ / FCS LTINT CXDA+08h TBADR[31:0] CXDA+0Ch RESERVED |
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