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AM79C970A датащи(PDF) 168 Page - Advanced Micro Devices

номер детали AM79C970A
подробное описание детали  PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
PDF  219 Pages
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производитель  AMD [Advanced Micro Devices]
домашняя страница  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C970A датащи(HTML) 168 Page - Advanced Micro Devices

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AMD
P R E L I M I N A R Y
168
Am79C970A
start of a new frame and starts a
new transmission.
UFLO is set by the PCnet-PCI II
controller
and
cleared
by
the host.
29
EXDEF
Excessive
Deferral.
Indicates
that the transmitter has experi-
enced Excessive Deferral on this
transmit frame, where Excessive
Deferral is defined in ISO 8802-3
(IEEE/ANSI 802.3). Excessive
Deferral will also set the interrupt
bit EXDINT (CSR5, bit 7).
28
LCOL
Late Collision indicates that a
collision has occurred after the
first slot time of the channel has
elapsed. The PCnet-PCI II con-
troller does not retry on late
collisions.
LCOL
is
set
by
the PCnet-PCI II controller and
cleared by the host.
27
LCAR
Loss of Carrier is set when
the
carrier
is
lost
during
a PCnet-PCI II controller-initiated
transmission when in AUI or
GPSI mode and the device is op-
erating in half-duplex mode. The
PCnet-PCI II controller does not
retry upon loss of carrier. It will
continue to transmit the whole
frame until done. LCAR will not
be set when the device is operat-
ing in full-duplex mode and the
AUI or GPSI port is active. LCAR
is not valid in Internal Loopback
Mode.
LCAR
is
set
by
the PCnet-PCI II controller and
cleared by the host.
In 10BASE-T mode, LCAR will
be set when the T-MAU was
in
Link
Fail
state
during
the transmission.
26
RTRY
Retry error indicates that the
transmitter has failed after 16 at-
tempts to successfully transmit a
message, due to repeated colli-
sions on the medium. If DRTY is
set to ONE in the MODE register,
RTRY will set after 1 failed trans-
mission attempt. RTRY is set by
the PCnet-PCI II controller and
cleared by the host.
25–16
TDR
Time Domain Reflectometer re-
flects the state of an internal
PCnet-PCI II controller counter
that counts at a 10 MHz rate from
the start of a transmission to the
occurrence of a collision or loss
of carrier. This value is useful in
determining
the
approximate
distance to a cable fault. The
TDR value is written by the
PCnet-PCI II controller and is
valid only if RTRY is set.
Note that 10 MHz gives very low
resolution and in general has
not been found to be particularly
useful. This feature is here
primarily
to
maintain
full
compatibility with the C-LANCE
device (Am79C90).
15–4
RES
Reserved locations.
3–0
TRC
Transmit Retry Count. Indicates
the number of transmit retries
of the associated packet. The
maximum count is 15. However,
if a RETRY error occurs, the
count will roll over to ZERO. In
this case only, the Transmit Retry
Count value of ZERO should be
interpreted as meaning 16. TRC
is written by the PCnet-PCI II
controller into the last transmit
descriptor of a frame, or when
an error terminates a frame.
Valid only when OWN is cleared
to ZERO.
TMD3
Bit
Name
Description
31–0
RES
Reserved locations.



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