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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC8548ECPXATHC датащи(PDF) 88 Page - Freescale Semiconductor, Inc |
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MPC8548ECPXATHC датащи(HTML) 88 Page - Freescale Semiconductor, Inc |
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88 / 151 page  MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9 88 Freescale Semiconductor Serial RapidIO Figure 53. Single Frequency Sinusoidal Jitter Limits Table 68. Receiver AC Timing Specifications—3.125 GBaud Characteristic Symbol Range Unit Notes Min Max Differential input voltage VIN 200 1600 mVp-p Measured at receiver Deterministic jitter tolerance JD 0.37 — UI p-p Measured at receiver Combined deterministic and random jitter tolerance JDR 0.55 — UI p-p Measured at receiver Total jitter tolerance1 JT 0.65 — UI p-p Measured at receiver Multiple input skew SMI — 22 ns Skew at the receiver input between lanes of a multilane link Bit error rate BER — 10-12 — Unit interval UI 320 320 ps ±100 ppm Note: 1. Total jitter is composed of three components, deterministic jitter, random jitter and single frequency sinusoidal jitter. The sinusoidal jitter may have any amplitude and frequency in the unshaded region of Figure 53. The sinusoidal jitter component is included to ensure margin for low frequency jitter, wander, noise, crosstalk and other variable system effects. 8.5 UI p-p 0.10 UI p-p 22.1 kHz 1.875 MHz 20 MHz Frequency |
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