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AM3703CUS датащи(PDF) 215 Page - Texas Instruments |
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AM3703CUS датащи(HTML) 215 Page - Texas Instruments |
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215 / 280 page ![]() SWPS038-062 mcbspx_clkr mcbspx_fsr mcbspx_dr D7 D6 D5 B2 B2 B3 B4 SWPS038-063 mcbspx_clkr mcbspx_fsr mcbspx_dr D7 D6 D5 B3 B4 B5 B6 AM3715, AM3703 www.ti.com SPRS616F – JUNE 2010 – REVISED AUGUST 2011 (1) In mcbspx, x identifies the McBSP number: 3, 4, or 5. Note that for the McBSP3, these timings concern only Set #1: multiplexing mode by default. The McBSP3 is also multiplexed on UART pins (Set #2) and on McBSP1 pins (Set #3): the corresponding timings are specified in Table 6-47 and Table 6-48. For the McBSP4, these timings concern only Set #2 (multiplexing mode on GPMC pins). (2) See Section 4.3.4, Processor Clocks. Table 6-52. McBSP3 (Set #1), 4 (Set #2), and 5 Switching Characteristics —Rising Edge and Receive Mode(1) (2) NO. PARAMETER OPP100 OPP50 UNIT MIN MAX MIN MAX B2 td(CLKXAE-FSXV) Delay time, mcbspx_clkx active edge to mcbspx_fsx 0.7 22.18 0.7 44.37 ns valid (1) In mcbspx, x identifies the McBSP number: 3, 4, or 5. Note that for the McBSP3, these timings concern only Set #1: multiplexing mode by default. The McBSP3 is also multiplexed on UART pins (Set #2) and on McBSP1 pins (Set #3): the corresponding timings are specified in Table 6-47 and Table 6-48. For the McBSP4, these timings concern only Set #2 (multiplexing mode on GPMC pins) (2) See Section 4.3.4, Processor Clocks. (1) In mcbspx, x identifies the McBSP number: 1, 2, 3, 4, or 5. Figure 6-36. McBSP Rising Edge Receive Timing in Master Mode (1) In mcbspx, x identifies the McBSP number: 1, 2, 3, 4, or 5. Figure 6-37. McBSP Rising Edge Receive Timing in Slave Mode 6.6.1.1.1.2 Timing with Rising Edge as Activation Edge —Transmit Mode Table 6-53. McBSP1, 2, and 3 (Sets #2 and #3) Timing Requirements —Rising Edge and Transmit Mode(1) (2) NO. PARAMETER OPP100 OPP50 UNIT MIN MAX MIN MAX B5 tsu(FSXV-CLKXAE) Setup time, mcbspx_fsx valid before mcbspx_clkx 3.67 7.94 ns active edge B6 th(CLKXAE-FSXV) Hold time, mcbspx_fsx valid after mcbspx_clkx active 0.5 0.5 ns edge Copyright © 2010–2011, Texas Instruments Incorporated Timing Requirements and Switching Characteristics 215 Submit Documentation Feedback Product Folder Link(s): AM3715 AM3703 |
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