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AM3703CUS датащи(PDF) 37 Page - Texas Instruments

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номер детали AM3703CUS
подробное описание детали  Sitara ARM Microprocessors
PDF  280 Pages
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домашняя страница  http://www.ti.com
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AM3703CUS датащи(HTML) 37 Page - Texas Instruments

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AM3715, AM3703
www.ti.com
SPRS616F
– JUNE 2010 – REVISED AUGUST 2011
Table 2-1. Ball Characteristics (CBP Pkg.)(3) (continued)
BALL
BALL
BALL
RESET
BUFFER
PULLUP
BALL TOP
RESET
IO CELL
BOTTOM
PIN NAME [2]
MODE [3]
TYPE [4]
RESET
REL. MODE POWER [8] HYS [9]
STRENGTH /DOWN
[1]
REL.
[12]
[1]
STATE [5]
[7]
(mA) [10]
TYPE [11]
STATE [6]
gpio_169
4
IO
uart2_cts
5
I
safe_mode
7
U25
NA
hsusb0_data4
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_188
4
IO
safe_mode
7
V28
NA
hsusb0_data5
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_189
4
IO
safe_mode
7
V27
NA
hsusb0_data6
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_190
4
IO
safe_mode
7
V26
NA
hsusb0_data7
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_191
4
IO
safe_mode
7
K21
NA
i2c1_scl
0
OD
H
H
0
vdds
NA
3
PU/ PD
(6)(7)
Open Drain
J21
NA
i2c1_sda
0
IOD
H
H
0
vdds
Yes
3
PU/ PD
(6)(7)
Open Drain
AF15
NA
i2c2_scl
0
OD
H
H
7
vdds
Yes
3
PU/ PD
(6) (8)
Open Drain
gpio_168
4
IO
4
safe_mode
7
AE15
NA
i2c2_sda
0
IOD
H
H
7
vdds
Yes
3
PU/ PD
(6) (8)
Open Drain
gpio_183
4
IO
4
safe_mode
7
AF14
NA
i2c3_scl
0
OD
H
H
7
vdds
Yes
3
PU/ PD
(6) (8)
Open Drain
gpio_184
4
IO
4
safe_mode
7
AG14
NA
i2c3_sda
0
IOD
H
H
7
vdds
Yes
3
PU/ PD
(6) (8)
Open Drain
gpio_185
4
IO
4
safe_mode
7
AD26
NA
i2c4_scl
0
OD
H
H
0
vdds
Yes
3
PU/ PD
(6)(7)
Open Drain
sys_ nvmode1
1
O
4
safe_mode
7
AE26
NA
i2c4_sda
0
IOD
H
H
0
vdds
Yes
3
PU/ PD
(6)(7)
Open Drain
sys_ nvmode2
1
O
4
safe_mode
7
J25
NA
hdq_sio
0
IOD
H
H
7
vdds
Yes
4
PU/ PD
LVCMOS
sys_altclk
1
I
i2c2_sccbe
2
OD
i2c3_sccbe
3
OD
gpio_170
4
IO
safe_mode
7
AB3
NA
mcspi1_clk
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
mmc2_dat4
1
IO
gpio_171
4
IO
safe_mode
7
AB4
NA
mcspi1_ simo
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
mmc2_dat5
1
IO
gpio_172
4
IO
safe_mode
7
AA4
NA
mcspi1_ somi
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
mmc2_dat6
1
IO
gpio_173
4
IO
safe_mode
7
AC2
NA
mcspi1_cs0
0
IO
H
H
7
vdds
Yes
4
PU/ PD
LVCMOS
Copyright
© 2010–2011, Texas Instruments Incorporated
TERMINAL DESCRIPTION
37
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Product Folder Link(s): AM3715 AM3703



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