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AM3703CUS датащи(PDF) 206 Page - Texas Instruments

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номер детали AM3703CUS
подробное описание детали  Sitara ARM Microprocessors
PDF  280 Pages
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AM3703CUS датащи(HTML) 206 Page - Texas Instruments

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AM3715, AM3703
SPRS616F
– JUNE 2010 – REVISED AUGUST 2011
www.ti.com
Table 6-39. DSS Timing Conditions
—RFBI Mode—MIPI DBI 2.0 - LCD Panel(2)
TIMING CONDITION PARAMETER
VALUE
UNIT
MIN
MAX
Input Conditions
tR
Input signal rise time
15
ns
tF
Input signal fall time
15
ns
Output Condition
CLOAD
Output load capacitance(1)
30
pF
(1) Buffer strength configuration: LB0 = 1.
(2) For any information regarding the RFBI registers configuration, see Display Subsystem / the Display Subsystem Environment / LCD
Support / Parallel Interface / Parallel Interface in RFBI Mode (MIPI DBI Protocol) / Transaction Timing Diagrams section of the
AM/DM37x Multimedia Device Technical Reference Manual (literature number SPRUGN4).
Table 6-40. DSS Timing Requirements
—RFBI Mode—MIPI DBI 2.0 - LCD Panel
NO.
PARAMETER
OPP100
OPP50
UNIT
MIN
MAX
MIN
MAX
DR0
tsu(dV-rdH)
Setup time, input data rfbi_da[15:0] valid to output
7.3
6.3
ns
read enable rfbi_rd high
DR1
th(rdH-dIV)
Hold time, output read enable rfbi_rd high to input data
10.6
9.6
ns
rfbi_da[15:0] invalid
td(Data sampled)
Input data rfbi_da[15:0] sampled at the end of the
N(1)
N(1)
ns
access time
(1) N = (AccessTime) * (TimeParaGranularity + 1) * L4CLK
Table 6-41. DSS Switching Characteristics
— RFBI Mode— MIPI DBI 2.0 - LCD Panel
PARAMETER
OPP100
OPP50
UNIT
MIN
MAX
MIN
MAX
tw(wrH)
Pulse duration, output write enable rfbi_wr high
A(1)
A(1)
ns
tw(wrL)
Pulse duration, output write enable rfbi_wr low
B(2)
B(2)
ns
td(a0-wrL)
Delay time, output command/data control rfbi_a0 transition to
C(3)
C(3)
ns
output write enable rfbi_wr low
td(wrH-a0)
Delay time, output write enable rfbi_wr high to output
D(4)
D(4)
ns
command/data control rfbi_a0 transition
td(csx-wrL)
Delay time, output chip select rfbi_csx(14) low to output write
E(5)
E(5)
ns
enable rfbi_wr low
td(wrH-csxH)
Delay time, output write enable rfbi_wr high to output chip select
F(6)
F(6)
ns
rfbi_csx(14) high
td(dV)
Output data rfbi_da[15:0] valid
G(7)
G(7)
ns
td(a0H-rdL)
Delay time, output command/data control rfbi_a0 high to output
H(8)
H(8)
ns
read enable rfbi_rd low
td(rdlH-a0)
Delay time, output read enable rfbi_rd high to output
I(9)
I(9)
ns
command/data control rfbi_a0 transition
tw(rdH)
Pulse duration, output read enable rfbi_rd high
J(10)
J(10)
ns
tw(rdL)
Pulse duration, output read enable rfbi_rd low
K(11)
K(11)
ns
td(rdL-csxL)
Delay time, output read enable rfbi_rd low to output chip select
L(12)
L(12)
ns
rfbi_csx(14) low
td(rdH-csxH)
Delay time, output read enable rfbi_rd high to output chip select
M(13)
M(13)
ns
rfbi_csx(14) high
tR(wr)
Rise time, output write enable rfbi_wr
10
10
ns
tF(wr)
Fall time, output write enable rfbi_wr
10
10
ns
tR(a0)
Rise time, output command/data control rfbi_a0
10
10
ns
tF(a0)
Fall time, output command/data control rfbi_a0
10
10
ns
tR(csx)
Rise time, output chip select rfbi_csx(14)
10
10
ns
206
Timing Requirements and Switching Characteristics
Copyright
© 2010–2011, Texas Instruments Incorporated
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Product Folder Link(s): AM3715 AM3703



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