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PIC16LC712 датащи(PDF) 39 Page - Microchip Technology |
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PIC16LC712 датащи(HTML) 39 Page - Microchip Technology |
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39 / 106 page ![]() 1999-2013 Microchip Technology Inc. DS41106C-page 39 PIC16C712/716 7.0 CAPTURE/COMPARE/PWM (CCP) MODULE(S) Each CCP (Capture/Compare/PWM) module contains a 16-bit register, which can operate as a 16-bit capture register, as a 16-bit compare register or as a PWM master/slave Duty Cycle register. Table 7-1 shows the timer resources of the CCP module modes. Capture/Compare/PWM Register 1 (CCPR1) is com- prised of two 8-bit registers: CCPR1L (low byte) and CCPR1H (high byte). The CCP1CON register controls the operation of CCP1. All are readable and writable. Additional information on the CCP module is available in the PIC® Mid-Range Reference Manual, (DS33023). TABLE 7-1: CCP MODE – TIMER RESOURCE FIGURE 7-1: CCP1CON REGISTER (ADDRESS 17h) FIGURE 7-2: TRISCCP REGISTER (ADDRESS 87H) CCP Mode Timer Resource Capture Compare PWM Timer1 Timer1 Timer2 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 — — DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR Reset bit7 bit0 bit 7-6: Unimplemented: Read as ‘0’ bit 5-4: DC1B1:DC1B0: PWM Least Significant bits Capture Mode: Unused Compare Mode: Unused PWM Mode: These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L. bit 3-0: CCP1M3:CCP1M0: CCP1 Mode Select bits 0000 = Capture/Compare/PWM off (resets CCP1 module) 0100 = Capture mode, every falling edge 0101 = Capture mode, every rising edge 0110 = Capture mode, every 4th rising edge 0111 = Capture mode, every 16th rising edge 1000 = Compare mode, set output on match (CCP1IF bit is set) 1001 = Compare mode, clear output on match (CCP1IF bit is set) 1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is unaffected) 1011 = Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1 and starts an A/D conversion (if A/D module is enabled)) 11xx = PWM mode R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 ———— — TCCP — TT1CK R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR Reset bit7 bit0 bit 7-3: Reserved bits; Do Not Use bit 2: TCCP – Tri-state control bit for CCP 0 = Output pin driven 1 = Output pin tristated bit 1: Reserved bit; Do Not Use bit 0: TT1CK – Tri-state control bit for T1CKI pin 0 = T1CKI pin is an output 1 = T1CKI pin is an input |
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