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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LPC81XM датащи(PDF) 36 Page - NXP Semiconductors |
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LPC81XM датащи(HTML) 36 Page - NXP Semiconductors |
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36 / 67 page  LPC81xM All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Objective data sheet Rev. 1.0 — 7 November 2012 36 of 67 NXP Semiconductors LPC81xM 32-bit ARM Cortex-M0+ microcontroller Conditions: VDD = 3.3 V; active mode entered executing code while(1){} from flash; all peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = <tbd>); all peripheral clocks disabled; internal pull-up resistors disabled; BOD disabled; low-current mode. 3 MHz - 6 MHz: system oscillator enabled; PLL, IRC disabled. 12 MHz: IRC enabled; system oscillator, PLL disabled. 24 MHz - 30 MHz: IRC disabled; system oscillator, PLL enabled. Fig 13. Active mode: Typical supply current IDD versus temperature Conditions: VDD = 3.3 V; sleep mode entered from flash; all peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = <tbd>); all peripheral clocks disabled; internal pull-up resistors disabled; BOD disabled; low-current mode. 3 MHz - 6 MHz: system oscillator enabled; PLL, IRC disabled. 12 MHz: IRC enabled; system oscillator, PLL disabled. 24 MHz - 30 MHz: IRC disabled; system oscillator, PLL enabled. Fig 14. Sleep mode: Typical supply current IDD versus temperature for different system clock frequencies X (X) X X X XX 001aac984 X X X X X X (X) X <tbd> X (X) X X X XX 001aac984 X X X X X X (X) X <tbd> |
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