| поискавой системы для электроныых деталей |
|
LPC81XM датащи(PDF) 17 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
LPC81XM датащи(HTML) 17 Page - NXP Semiconductors |
|
17 / 67 page ![]() LPC81xM All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Objective data sheet Rev. 1.0 — 7 November 2012 17 of 67 NXP Semiconductors LPC81xM 32-bit ARM Cortex-M0+ microcontroller – Any occurrence of a pattern match can be programmed to also generate an RXEV notification to the ARM CPU. The RXEV signal can be connected to a pin. – The pattern match engine does not facilitate wake-up. 7.12 USART0/1/2 Remark: USART0 and USART1 are available on all LPC800 parts. USART2 is available on parts LPC812M101FDH16 and LPC812M101FDH20 only. All USART functions are movable functions and are assigned to pins through the switch matrix. 7.12.1 Features • Maximum bit rates of 1.875 Mbit/s in asynchronous mode and 30 Mbit/s in synchronous mode for USART functions connected to all digital pins except PIO0_10 and PIO0_11. • 7, 8, or 9 data bits and 1 or 2 stop bits • Synchronous mode with master or slave operation. Includes data phase selection and continuous clock option. • Multiprocessor/multidrop (9-bit) mode with software address compare. (RS-485 possible with software address detection and transceiver direction control.) • Parity generation and checking: odd, even, or none. • One transmit and one receive data buffer. • RTS/CTS for hardware signaling for automatic flow control. Software flow control can be performed using Delta CTS detect, Transmit Disable control, and any GPIO as an RTS output. • Received data and status can optionally be read from a single register • Break generation and detection. • Receive data is 2 of 3 sample "voting". Status flag set when one sample differs. • Built-in Baud Rate Generator. • A fractional rate divider is shared among all UARTs. • Interrupts available for Receiver Ready, Transmitter Ready, Receiver Idle, change in receiver break detect, Framing error, Parity error, Overrun, Underrun, Delta CTS detect, and receiver sample noise detected. • Separate data and flow control loopback modes for testing. • Baud rate clock can also be output in asynchronous mode. • Supported by on-chip ROM API. 7.13 SPI0/1 Remark: SPI0 is available on all LPC800 parts. SPI1 is available on parts LPC812M101FDH16 and LPC812M101FDH20 only. All SPI functions are movable functions and are assigned to pins through the switch matrix. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |