S29GL01GS datasheet(15/104 Pages) SPANSION

15 / 104 page

March 16, 2012 S29GL_128S_01GS_00_06

GL-S MirrorBit® Family

Data

She e t

2.2.1

Device ID

The Joint Electron Device Engineering Council (JEDEC) standard JEP106T defines the manufacturer ID for a

compliant memory. Common industry usage defined a method and format for reading the manufacturer ID

and a device specific ID from a memory device. The manufacturer and device ID information is primarily

intended for programming equipment to automatically match a device with the corresponding programming

algorithm. Spansion has added additional fields within this 32-byte address space.

The original industry format was structured to work with any memory data bus width e. g. x8, x16, x32. The ID

code values are traditionally byte wide but are located at bus width address boundaries such that

incrementing the device address inputs will read successive byte, word, or double word locations with the ID

codes always located in the least significant byte location of the data bus. Because the device data bus is

word wide each code byte is located in the lower half of each word location. The original industry format made

the high order byte always 0. Spansion has modified the format to use both bytes in some words of the

address space. For the detail description of the Device ID address map see Table 6.2 on page 60.

2.2.2

Common Flash Memory Interface

The JEDEC Common Flash Interface (CFI) specification (JESD68.01) defines a standardized data structure

that may be read from a flash memory device, which allows vendor-specified software algorithms to be used

for entire families of devices. The data structure contains information for system configuration such as various

electrical and timing parameters, and special functions supported by the device. Software support can then

be device-independent, Device ID-independent, and forward-and-backward-compatible for entire Flash

device families.

The system can read CFI information at the addresses within the selected sector as shown in Device ID and

Common Flash Interface (ID-CFI) ASO Map on page 60.

Like the Device ID information, CFI information is structured to work with any memory data bus width e. g. x8,

x16, x32. The code values are always byte wide but are located at data bus width address boundaries such

that incrementing the device address reads successive byte, word, or double word locations with the codes

always located in the least significant byte location of the data bus. Because the data bus is word wide each

code byte is located in the lower half of each word location and the high order byte is always 0.

For further information, please refer to the Spansion CFI Specification, Version 1.4 (or later), and the JEDEC

publications JEP137-A and JESD68.01. Please contact JEDEC (http://www.jedec.org/) for their standards

and the Spansion CFI Specification may be found at the Spansion Web site

(http://www.spansion.com/Support/TechnicalDocuments/Pages/ApplicationNotes.aspx at the time of this

document's publication) or by contacting a local Spansion sales office listed on the web site.

2.3

Status Register ASO

The Status register ASO contains a single word of registered volatile status for Embedded Algorithms. When

the Status Register read command is issued, the current status is captured by the register and the ASO is

entered. The Status Register content appears at all word locations in the device address space. However, it is

recommended to read the status only at word location 0 for future compatibility. The first read access in the

Status Register ASO exits the ASO and returns to the address space map in use when the Status Register

read command was issued.

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