S29GL01GS datasheet(37/104 Pages) SPANSION

37 / 104 page

March 16, 2012 S29GL_128S_01GS_00_06

GL-S MirrorBit® Family

Data

She e t

5.3.6.8

DYB ASO

The system can access the DYB ASO by issuing the DYB entry command sequence during Read Mode. This

entry command does not use a sector address from the entry command. The DYB bit for a sector appears in

bit 0 of all word locations in the sector.

The DYB ASO allows the following activities:

 Read DYB protection status of a sector in bit 0 of any word in the sector.

 Set the DYB bit using a modified Word Programming command.

 Clear the DYB bit using a modified Word Programming command.

 ASO Exit using legacy Command Set Exit command for backward software compatibility.

 ASO Exit using the common exit command for all ASO - alternative for a consistent exit method.

5.3.6.9

Software (Command) Reset / ASO exit

Software reset is part of the command set (See Table 6.1, Command Definitions on page 57) that also

returns the EAC to standby state and must be used for the following conditions:

 Exit ID/CFI mode

 Clear timeout bit (DQ5) for data polling when timeout occurs

Software Reset does not affect EA mode. Reset commands are ignored once programming or erasure has

begun, until the operation is complete. Software Reset does not affect outputs; it serves primarily to return to

Read mode from an ASO mode or from a failed program or erase operation.

Software Reset may cause a return to Read mode from undefined states that might result from invalid

command sequences. However, a Hardware Reset may be required to return to normal operation from some

undefined states.

There is no software reset latency requirement. The reset command is executed during the tWPH period.

5.4

Status Monitoring

There are three methods for monitoring EA status. Previous generations of the S29GL flash family used the

methods called Data Polling and Ready/Busy# (RY/BY#) Signal. These methods are still supported by the

S29GL-S family. One additional method is reading the Status Register. Only the Status Register method will

be supported in future technology nodes.

5.4.1

Status Register

The status of program and erase operations is provided by a single 16-bit status register. The Status Register

Read command is written followed by one read access of the status register information. The contents of the

status register is aliased (overlaid) in all locations of the device address space. The overlay is in effect for one

read access, specifically the next read access that follows the Status Register Read command. After the one

status register access, the Status Register ASO is exited. The CE# or OE# signal must go High following the

status register read access for tCEPH/tOEPH time to return to the address space active at the time the Status

The status register contains bits related to the results - success or failure - of the most recently completed

Embedded Algorithms (EA):

 Erase Status (bit 5),

 Program Status (bit 4),

 Write Buffer Abort (bit 3),

 Sector Locked Status (bit 1),

 RFU (bit 0).

and, bits related to the current state of any in process EA:

 Device Busy (bit 7),

 Erase Suspended (bit 6),

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