S29GL01GS datasheet(46/104 Pages) SPANSION

46 / 104 page

GL-S MirrorBit® Family

S29GL_128S_01GS_00_06 March 16, 2012

Da ta

Sh e e t

5.6

Embedded Algorithm Performance Table

Notes:

1. Not 100% tested.

2. Typical program and erase times assume the following conditions: 25°C, 3.0V VCC, 10,000 cycle, and a random data pattern.

3. Under worst case conditions of 90°C, VCC = 2.70V, 100,000 cycles, and a random data pattern.

4. Effective write buffer specification is based upon a 512-byte write buffer operation.

5. In the pre-programming step of the Embedded Erase algorithm, all words are programmed to 0000h before Sector and Chip erasure.

6. System-level overhead is the time required to execute the bus-cycle sequence for the program command. See Table 6.1, Command

Definitions on page 57 for further information on command definitions.

Table 5.4 Embedded Algorithm Characteristics (-40°C to +85°C)

Parameter

Typ (Note 2)

Max (Note 3)

Unit

Comments

Sector Erase Time 128 kbyte

275

1100

Includes pre-programming prior

to erasure (Note 5)

Single Word Programming Time (Note 1)

125

400

µs

Buffer Programming Time

2-byte (Note 1)

125

750

µs

32-byte (Note 1)

160

750

64-byte (Note 1)

175

750

128-byte (Note 1)

198

750

256-byte (Note 1)

239

750

512-byte

340

750

Effective Write Buffer Program

Operation per Word

512-byte

1.33

µs

Sector Programming Time 128 kB (full Buffer

Programming)

108

192

(Note 6)

Erase Suspend/Erase Resume (tESL)

µs

Program Suspend/Program Resume (tPSL)

µs

Erase Resume to next Erase Suspend (tERS)

100

µs

Minimum of 60 ns but

≥ typical

periods are needed for Erase to

progress to completion.

Program Resume to next Program Suspend (tPRS)

100

µs

Minimum of 60 ns but

≥ typical

periods are needed for Program

to progress to completion.

Blank Check

6.2

8.5

NOP (Number of Program-operations, per Line)

256

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