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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SPC56EC74L7 датащи(PDF) 46 Page - STMicroelectronics |
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SPC56EC74L7 датащи(HTML) 46 Page - STMicroelectronics |
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46 / 118 page  Package pinouts and signal descriptions SPC564Bxx - SPC56ECxx 46/118 Doc ID 17478 Rev 4 PM[1] PCR[193] AF0 AF1 AF2 AF3 GPIO[193] — MDO10 — SIUL — Nexus — I/O — O — M/S Tristate — — E9 PM[2] PCR[194] AF0 AF1 AF2 AF3 GPIO[194] — MDO11 — SIUL — Nexus — I/O — O — M/S Tristate — — F12 PM[3] PCR[195] AF0 AF1 AF2 AF3 GPIO[195] — — — SIUL — — — I/O — — — M/S Tristate — — K12 PM[4] PCR[196] AF0 AF1 AF2 AF3 GPIO[196] — — — SIUL — — — I/O — — — M/S Tristate — — L12 PM[5] PCR[197] AF0 AF1 AF2 AF3 GPIO[197] — — — SIUL — — — I/O — — — M/S Tristate — — F9 PM[6] PCR[198] AF0 AF1 AF2 AF3 GPIO[198] — — — SIUL — — — I/O — — — M/S Tristate — — F6 1. Alternate functions are chosen by setting the values of the PCR.PA bitfields inside the SIUL module. PCR.PA = 000 → AF0; PCR.PA = 001 → AF1; PCR.PA = 010 → AF2; PCR.PA = 011 → AF3; PCR.PA = 100 → ALT4. This is intended to select the output functions; to use one of the input functions, the PCR.IBE bit must be written to ‘1’, regardless of the values selected in the PCR.PA bitfields. For this reason, the value corresponding to an input only function is reported as “—”. 2. Multiple inputs are routed to all respective modules internally. The input of some modules must be configured by setting the values of the PSMIO.PADSELx bitfields inside the SIUL module. 3. NMI[0] and NMI[1] have a higher priority than alternate functions. When NMI is selected, the PCR.PA field is ignored. 4. SXOSC’s OSC32k_XTAL and OSC32k_EXTAL pins are shared with GPIO functionality. When used as crystal pins, other functionality of the pin cannot be used and it should be ensured that application never programs OBE and PUE bit of the corresponding PCR to "1". 5. If you want to use OSC32K functionality through PB[8] and PB[9], you must ensure that PB[10] is static in nature as PB[10] can induce coupling on PB[9] and disturb oscillator frequency. 6. Out of reset all the functional pins except PC[0:1] and PH[9:10] are available to the user as GPIO. PC[0:1] are available as JTAG pins (TDI and TDO respectively). PH[9:10] are available as JTAG pins (TCK and TMS respectively). It is up to the user to configure these pins as GPIO when needed. 7. When MBIST is enabled to run ( STCU Enable = 1), the application must not drive or tie PAD[178) (MDO[0]) to 0 V before the device exits reset (external reset is removed) as the pad is internally driven to 1 to indicate MBIST operation. When MBIST is not enabled (STCU Enable = 0), there are no restriction as the device does not internally drive the pad. Table 5. Functional port pin descriptions (continued) Port pin PCR Function Pin number |
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