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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC5645S датащи(PDF) 16 Page - Freescale Semiconductor, Inc |
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MPC5645S датащи(HTML) 16 Page - Freescale Semiconductor, Inc |
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16 / 146 page  Qorivva MPC5645S Microcontroller Data Sheet, Rev. 8 16 Freescale Semiconductor 1.4.18 Video Input Unit (VIU2) The VIU2 is a crossbar master module accepting an ITU656 compatible video input stream on a parallel interface, converting the pixel data to RGB or YUV format and transferring the video image to internal frame buffer memory or external DRAM if available. • Supports 8-bit/10-bit ITU656 video input • Output formats: — RGB888 — RGB565 — 8-bit monochrome — YCrCb 4:2:2 • Video downscaling • Contrast and Brightness adjustment • De-interlace for interlaced video image • Internal DMA engine for data transfer to memory 1.4.19 Boot Assist Module (BAM) The BAM is a block of read-only memory that is programmed once by Freescale. The BAM program is executed every time the MCU is powered-on or reset in normal mode. The BAM supports different modes of booting. They are: • Booting from internal flash memory • Serial boot loading (A program is downloaded into RAM via FlexCAN or LINFlex and then executed) • Booting from external memory Additionally the BAM: • Enables and manages the transition of the MCU from reset to user code execution • Configures device for serial bootload • Enables multiple bootcode starting locations out of reset through implementation of search for valid Reset Configuration Halfword 1.4.20 Enhanced Modular Input/Output System (eMIOS) This device has two eMIOS modules, each with 16 channels supporting a range of 16-bit Input Capture, Output Compare, Pulse Width Modulation, and Quadrature Decode functions. • Selectable clock source from primary FMPLL, secondary FMPLL, external 4 - 16 MHz oscillator or 16 MHz Internal RC oscillator on a per module basis • Timed I/O channels with 16-bit counter resolution • Buffered updates • Support for shifted PWM outputs to minimize occurrence of concurrent edges • Edge aligned output pulse width modulation — Programmable pulse period and duty cycle — Supports 0% and 100% duty cycle — Shared or independent time bases • Programmable phase shift between channels • 4 channels of Quadrature Decode • DMA transfer support |
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