поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

MPC5645S датащи(PDF) 34 Page - Freescale Semiconductor, Inc

номер детали MPC5645S
подробное описание детали  Qorivva MPC5645S Microcontroller Data Sheet
PDF  146 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC5645S датащи(HTML) 34 Page - Freescale Semiconductor, Inc

Back Button MPC5645S Datasheet HTML 30Page - Freescale Semiconductor, Inc MPC5645S Datasheet HTML 31Page - Freescale Semiconductor, Inc MPC5645S Datasheet HTML 32Page - Freescale Semiconductor, Inc MPC5645S Datasheet HTML 33Page - Freescale Semiconductor, Inc MPC5645S Datasheet HTML 34Page - Freescale Semiconductor, Inc MPC5645S Datasheet HTML 35Page - Freescale Semiconductor, Inc MPC5645S Datasheet HTML 36Page - Freescale Semiconductor, Inc MPC5645S Datasheet HTML 37Page - Freescale Semiconductor, Inc MPC5645S Datasheet HTML 38Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 34 / 146 page
background image
Qorivva MPC5645S Microcontroller Data Sheet, Rev. 8
34
Freescale Semiconductor
2.4.6
VIU muxing
The DCU3, DCULite, and VIU2 modules share the same pins for input video. It is, however, possible to feed independent video
streams to VIU2 and DCU3 (operating in narrow mode). Figure 5 explains the pin sharing arrangement.
DDR_CAS
Column Address Strobe
Output
DDR
PCR[221]
Output,
None
B6
DDR_RAS
Row Address Strobe
Output
DDR
PCR[227]
Output,
None
B7
DDR_WEB
Write Enable
Output
DDR
PCR[228]
Output,
None
B9
DDR_ODT
DRAM On-die termination
Output
DDR
PCR[226]
Output,
Pull Down
D5
DDR_CLK
DRAM Clock
Output
DDR
PCR[225]
Output,
None
C7
DDR_CLKB
DRAM Clock bar
Output
DDR
NA
Output,
None
D7
DDR_CK
DRAM Clock Enable
Output
DDR
PCR[222]
Output,
Pull Down
D8
DDR_CS
DRAM Chip Select
Output
DDR
PCR[223]
Output,
None
D9
MVREF
DDR Reference Voltage
Input
—
NA
—
J4
MVTT
DRAM Termination Voltage
Input
—
NA
—
F2,J2,M2,R2
1 These port pins are disabled and unpowered on packages where the DRAM interface is not bonded out.
2 Reset configuration is given as I/O direction and pull direction (for example, “Input, pullup”).
Table 6. DRAM interface pin summary (continued)
Port pin1
Function
I/O
direction
Pad
type
PCR
RESET
config2
Pin number
416 TEPBGA



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com