MPC5645S datasheet(63/146 Pages) FREESCALE

63 / 146 page

Qorivva MPC5645S Microcontroller Data Sheet, Rev. 8

Freescale Semiconductor

4.5

Thermal characteristics

Table 12. Recommended operating conditions (5.0 V)

Symbol

Parameter

Conditions

Value

Unit

SpecID

Min

Max

VDDA

1 100 nF capacitance needs to be provided between V

DDA/VSSA pair.

SR P Voltage on VDDA pin (ADC reference) with re-

spect to ground (VSS)

—

+4.5

+5.5

D2.19

Voltage drop2

2 Full functionality cannot be guaranteed when voltage drops below 4.5 V. In particular, I/O DC and ADC electrical

characteristics may not be guaranteed below 4.5 V during the voltage drop sequence.

+3.0

+5.5

Relative to VDD

VDD–0.1

VDD+0.1

VSSA

SR D Voltage on VSSA (ADC reference) pin with

respect VSS

—VSS–0.1

VSS+0.1

D2.20

VDDPLL

CC P Voltage on VDDPLL (1.2 V PLL supply) pin

with respect to ground (VSSPLL)

—

1.08

1.32

D2.21

VDDR

3 10

F capacitance must be connected between V

DDR and VSS12. It is recommended that this cap should be placed, as close

as possible to the DUT pin on board.

SR P Voltage on VDDR pin (regulator supply) with

respect to ground (VSSR)

—

+3.0

+3.6

D2.22

Voltage drop2

+3.0

+3.6

Relative to VDD

VDD–0.1

VDD+0.1

VSSR

SR D Voltage on VSSR (regulator ground) pin with

respect to VSS

—VSS–0.1

VSS+0.1

D2.23

VDD12

4,5

CC P Voltage on VDD12 pin with respect to ground

(VSS12)

—

1.08

1.4

D2.24

VSS12

CC D Voltage on VSS12 pin with respect to VSS

—VSS–0.1

VSS+0.1

D2.25

VDD

6,7

SR P Voltage on VDD pins (VDDE_A, VDDE_B,

VDD_DR, VDDMA, VDDMB, VDDMC) with

respect to ground (VSS)

Voltage drop2

VDDmin

VDDmax

D2.26

VSS

SR D I/O supply ground

—

D2.27

VDDE_A

SR P Voltage on VDDE_A (I/O supply) pin with

respect to ground (VSSE_A)

—

+4.5

+5.5

D2.28

VDDE_B

SR P Voltage on VDDE_B (I/O supply) pin with

respect to ground (VSSE_B)

—

+3.0

+3.6

D2.29

VDDM

SR P Voltage on VDDMA (stepper motor supply)

pin with respect to ground (VSSMA)

—

+4.5

+5.5

D2.30

VDD_DR

P Voltage on VDD_DR with respect to VSS

—

+1.62

+3.6

D2.31

VSS_DR

D Voltage on VSSRSDS with respect to VSS

—

+1.62

+3.6

D2.32

VRSDS

P Voltage on VDD_DR with respect to VSS

—

+3.0

+3.6

D2.33

TVDD

SR D VDD slope to ensure correct power up

——

V/ms

D2.34

SR P Ambient temperature under bias

—

–40

+105

°C

D2.35

–40

+105

SR D Junction temperature under bias

—

–40

+140

—

D2.36

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