MPC5645S datasheet(64/146 Pages) FREESCALE

64 / 146 page

Qorivva MPC5645S Microcontroller Data Sheet, Rev. 8

Freescale Semiconductor

4 V

DD12 cannot be used to drive any external component.

5 Each V

DD12/VSS12 supply pair should have a 10 F capacitor. Absolute combined maximum capacitance is 40 F. Preferably,

all the VDD12 supply pads should be shorted and then connected to a 4

10 F capacitance. This is to ensure the ESR of

external capacitance does not exceed 0.2

. A 100 nF capacitor must be placed close to the pin.

6 V

DD refers collectively to I/O voltage supplies, i.e., VDDE_A, VDDE_B, VDDE_DR, VDDMA, VDDMB and VDDMC. VDDmin value for

is 4.5 V for VDDE_A & VDDM, 3 V VDDE_B, while it is 1.62 V for VDD_DR. VDD max value is 5.5 V for VDDE_A & VDDM

and 3.6 V for VDDE_B & VDD_DR.

7 100 nF capacitance needs to be provided between each V

DD/VSS pair.

8 V

SS refers collectively to I/O voltage supply grounds, i.e., VSSE_A, VSSE_B, VSSE_A, VSSE_E, VSSMA, VSSMB and VSSMC) unless

otherwise noted.

9 V

DDE_A should not be less than VDDA.

10 VDDE_B cannot go beyond 3.6V under any operating condition.

11 VDD_DR can be 1.8, 2.5 and 3.3V (typical) based on type of SDR memory.

12 Guaranteed by device validation.

Table 13. Thermal characteristics for 176-pin LQFP1

1 Thermal characteristics are targets based on simulation that are subject to change per device characterization.

Symbol

Parameter

Conditions

Value

Unit

SpecID

RJA

D Junction to Ambient Natural Convection2

2 Junction-to-Ambient Thermal Resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test board meets

JEDEC specification for this package.

Single layer board - 1s

°C/W

D3.1

RJA

D Junction to Ambient Natural Convection2

Four layer board - 2s2p

°C/W

D3.2

RJMA

D Junction to Ambient2

@200 ft./min., single layer

board - 1s

°C/W

D3.3

RJMA

D Junction to Ambient2

@200 ft./min., Four layer

board - 2s2p

°C/W

D3.4

RJB

D Junction to Board3

3 Junction-to-Board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification for

the specified package.

—18

°C/W

D3.5

RJCtop

D Junction to Case (Top)4

4 Junction-to-Case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is used

for the case temperature. Reported value includes the thermal resistance of the interface layer.

—5

°C/W

D3.6



D Junction to Package Top Natural Convec-

tion5

5 Thermal characterization parameter indicating the temperature difference between the package top and the junction

temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written

as Psi-JT.

—2

°C/W

D3.7

Table 14. Thermal characteristics for 208-pin LQFP1

Symbol

Parameter

Conditions

Value

Unit

SpecID

RJA

D Junction to Ambient Natural Convection2

Single layer board - 1s

°C/W

D3.8

RJA

D Junction to Ambient Natural Convection2

Four layer board - 2s2p

°C/W

D3.9

RJMA

D Junction to Ambient2

@200 ft./min., single layer

board - 1s

°C/W

D3.10

RJMA

D Junction to Ambient2

@200 ft./min., Four layer

board - 2s2p

°C/W

D3.11

RJB

D Junction to Board3

—

°C/W

D3.12

RJCtop

D Junction to Case (Top)4

—

°C/W

D3.13

MPC5645S датащи(PDF) 64 Page - Freescale Semiconductor, Inc

MPC5645S датащи(HTML) 64 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL