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HT46R0664 датащи(PDF) 39 Page - Holtek Semiconductor Inc |
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HT46R0664 датащи(HTML) 39 Page - Holtek Semiconductor Inc |
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39 / 92 page ![]() Rev. 1.00 38 ����st 1�� �011 Rev. 1.00 39 ����st 1�� �011 HT46R0664 Enhanced A/D+LCD 8-Bit OTP MCU Reset Initial Conditions The different types of reset described affect the reset flags in different ways. These flags, known as PDF and TO are located in the status register and are controlled by various microcontroller operations, such as the SLEEP or IDLE Mode function or Watchdog Timer. The reset flags are shown in the table: TO PDF RESET Conditions 0 0 Power-on reset � � LVR reset d�rin� NORM�L or SLOW Mode operation 1 � WDT time-o�t reset d�rin� NORM�L or SLOW Mode operation 1 1 WDT time-o�t reset d�rin� IDLE or SLEEP Mode operation “�” �nchan�ed The following table indicates the way in which the various components of the microcontroller are affected after a power-on reset occurs. Item Condition After RESET Pro�ram Co�nter Reset to zero Interr�pts �ll interr�pts will be disabled Prescaler� Divider Cleared WDT� Time Base Clear after reset� WDT be�ins co�ntin� Timer/Event Co�nter Timer Co�nter will be t�rned off Inp�t/O�tp�t Ports I/O ports will be set�p as inp�ts� and �N0~�N11 as �/D inp�t pins Stack Pointer Stack Pointer will point to the top of the stack The different kinds of resets all affect the internal registers of the microcontroller in different ways. To ensure reliable continuation of normal program execution after a reset occurs, it is important to know what condition the microcontroller is in after a particular reset occurs. The following table describes how each type of reset affects the microcontroller internal registers. Register Power-on Reset LVR Reset WDT Time-out (Normal Operation) WDT Time-Out (Idle/Sleep) PCL 0000 0000 0000 0000 0000 0000 0000 0000 MP0 xxxx xxxx xxxx xxxx xxxx xxxx ���� ���� MP1 xxxx xxxx xxxx xxxx xxxx xxxx ���� ���� BP - - - - - - 00 - - - - - - 00 - - - - - - 00 - - - - - - �� �CC xxxx xxxx ���� ���� ���� ���� ���� ���� TBLP xxxx xxxx ���� ���� ���� ���� ���� ���� TBLH xxxx xxxx ���� ���� ���� ���� ���� ���� WDTC 0 10 1 0 011 0 10 1 0 011 0 10 1 0 011 ���� ���� ST�TUS --00 xxxx -- �� ���� --1 � ���� --1 1 ���� INTC0 -000 0000 -000 0000 -000 0000 - ��� ���� INTC1 -000 -000 -000 -000 -000 0000 - ��� - ��� TMR0 xxxx xxxx xxxx xxxx xxxx xxxx ���� ���� TMR0C 00-0 1000 00-0 1000 00-0 1000 ���� ���� TMR1 xxxx xxxx xxxx xxxx xxxx xxxx ���� ���� TMR1C 0000 1--- 0000 1--- 0000 1--- ���� � --- CTRL4 ---0 -1 1 1 ---0 -1 1 1 ---0 -1 1 1 --- � - ��� P� 1111 1111 1111 1111 1111 1111 ���� ���� P�C 1111 1111 1111 1111 1111 1111 ���� ���� P�WK 0000 0000 0000 0000 0000 0000 ���� ���� P�PU -000 0000 -000 0000 -000 0000 - ��� ���� |
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