HT46R0664 datasheet(87/92 Pages) HOLTEK

87 / 92 page

Rev. 1.00

��st 1�� 011

Rev. 1.00

��st 1�� 011

HT46R0664

Enhanced A/D+LCD 8-Bit OTP MCU

Rotate Data Memory ri�ht thro��h Carry with res�lt in �CC

Data in the specified Data Memory and the carry flag are rotated right by 1 bit. Bit

0 replaces the Carry bit and the original carry flag is rotated into bit 7. The rotated

res�lt is stored in the �cc�m�lator and the contents of the Data Memory remain

�nchan�ed.

�CC.i ← [m].(i+1); (i = 0~6)

�CC.7 ← C

C ← [m].0

S�btract Data Memory from �CC with Carry

The contents of the specified Data Memory and the complement of the carry flag

are s�btracted from the �cc�m�lator. The res�lt is stored in the �cc�m�lator. Note

that if the result of subtraction is negative, the C flag will be cleared to 0, otherwise

if the result is positive or zero, the C flag will be set to 1.

�CC ← �CC ― [m] ― C

OV� Z� �C� C

S�btract Data Memory from �CC with Carry and res�lt in Data Memory

The contents of the specified Data Memory and the complement of the carry flag

are s�btracted from the �cc�m�lator. The res�lt is stored in the Data Memory. Note

that if the result of subtraction is negative, the C flag will be cleared to 0, otherwise

if the result is positive or zero, the C flag will be set to 1.

�CC ← �CC ― [m] ― C

OV� Z� �C� C

Skip if decrement Data Memory is 0

The contents of the specified Data Memory are first decremented by 1. If the result

is 0 the followin� instr�ction is skipped. �s this req�ires the insertion of a d�mmy

instr�ction while the next instr�ction is fetched� it is a two cycle instr�ction. If the

res�lt is not 0 the pro�ram proceeds with the followin� instr�ction.

[m] ← [m] ― 1

Skip if [m] = 0

None

Skip if decrement Data Memory is zero with res�lt in �CC

The contents of the specified Data Memory are first decremented by 1. If the result

is 0� the followin� instr�ction is skipped. The res�lt is stored in the �cc�m�lator

but the specified Data Memory contents remain unchanged. As this requires the

insertion of a d�mmy instr�ction while the next instr�ction is fetched� it is a two

cycle instr�ction. If the res�lt is not 0� the pro�ram proceeds with the followin�

instr�ction.

�CC ← [m] ― 1

Skip if �CC = 0

None

RRCA [m]

Description

Operation

Affected flag(s)

SBC A,[m]

Description

Operation

Affected flag(s)

SBCM A,[m]

Description

Operation

Affected flag(s)

SDZ [m]

Description

Operation

Affected flag(s)

SDZA [m]

Description

Operation

Affected flag(s)

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