HT46R0664 datasheet(34/92 Pages) HOLTEK

34 / 92 page

Rev. 1.00

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Rev. 1.00

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HT46R0664

Enhanced A/D+LCD Type 8-Bit OTP MCU

CTRL3 Register

Bit

Name

—

LVRF

LRF

WRF

R/W

—

R/W

POR

—

Bit 7~3

“—”: Unimplemented, read as 0

Bit 2

LVRF: LVR function reset flag

Describe elsewhere.

Bit 1

LRF: LVR Control register software reset flag

Describe elsewhere.

Bit 0

WRF: WDT Control register software reset flag

0: Not occur

1: Occurred

This bit is set to 1 by the WDT Control register software reset and cleared by the

application program. Note that this bit can only be cleared to 0 by the application

program.

Watchdog Timer Operation

The Watchdog Timer operates by providing a device reset when its timer overflows. This means

that in the application program and during normal operation the user has to strategically clear the

Watchdog Timer before it overflows to prevent the Watchdog Timer from executing a reset. This is

done using the clear watchdog instructions. If the program malfunctions for whatever reason, jumps

to an unknown location, or enters an endless loop, these clear instructions will not be executed in

the correct manner, in which case the Watchdog Timer will overflow and reset the device. Some

of the Watchdog Timer options, such as always on select and clear instruction type are selected

using configuration options. With regard to the Watchdog Timer enable/disable function, there

are also five bits, WE4~WE0, in the WDTC register to offer additional enable/disable and reset

control of the Watchdog Timer. If the WDT configuration option is determined that the WDT

function is always enabled, the WE4~WE0 bits still have effects on the WDT function. When the

WE4~WE0 bits value is equal to 01010B or 10101B, the WDT function is enabled. However, if the

WE4~WE0 bits are changed to any other values except 01010B and 10101B, which is caused by

the environmental noise, it will reset the microcontroller after 2~3 LIRC clock cycles. If the WDT

configuration option is determined that the WDT function is controlled by the WDT control register,

the WE4~WE0 values can determine which mode the WDT operates in. The WDT function will be

disabled when the WE4~WE0 bits are set to a value of 10101B. The WDT function will be enabled

if the WE4~WE0 bits value is equal to 01010B. If the WE4~WE0 bits are set to any other values by

the environmental noise, except 01010B and 10101B, it will reset the device after 2~3 LIRC clock

cycles. After power on these bits will have the value of 01010B.

Watchdog Timer Enable/Disable Control

WDT Configuration Option

WE4 ~ WE0 Bits

WDT Function

�lways Enable

01010B or 10101B

Enable

�ny other val�e

Reset MCU

Controlled by WDT Control

Re�ister

10101B

Disable

01010B

Enable

�ny other val�e

Reset MCU

Under normal program operation, a Watchdog Timer time-out will initialise a device reset and set

the status bit TO. However, if the system is in the SLEEP or IDLE Mode, when a Watchdog Timer

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