HT46R0664 datasheet(73/92 Pages) HOLTEK

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HT46R0664

Enhanced A/D+LCD 8-Bit OTP MCU

Display Memory

An area of Data Memory is especially reserved for use for the LCD display data. This data area

is known as the Display Memory. Any data written here will be automatically read by the internal

display driver circuits, which will in turn automatically generate the necessary LCD signals.

Therefore any data written into this Memory will be immediately reflected into the actual display

connected to the microcontroller. As the Display Memory addresses overlap those of the General

Purpose Data Memory, it stored in its own independent Bank 1 area. The Data Memory Bank to be

used is chosen by using the Bank Pointer, which is a special function register in the Data Memory,

with the name, BP. To access the Display Memory therefore requires first that Bank 1 is selected

by writing a value of 01H to the BP register. After this, the memory can then be accessed by using

indirect addressing through the use of Memory Pointer MP1. With Bank 1 selected, then using

MP1 to read or write to the memory area, starting with address 40H, will result in operations to the

Display Memory. Directly addressing the Display Memory is not applicable and will result in a data

access to the Bank 0 General Purpose Data Memory.

The accompanying Display Memory Map diagrams shows how the internal Display Memory is

mapped to the Segments and Commons of the display for the device.

40 H

CO M

SE GM EN T

41 H4 2H

43 H5 3H 54 H5 5H

Bi t

56 H

LCD Registers

Control Registers in the Data Memory, are used to control the various setup features of the LCD

Driver. There are three control register for the LCD function, CTRL2, LCDC and LCDO. Various

bits in these registers control functions such as duty type, bias type, bias resistor selection as well as

overall LCD enable and disable. The LCDEN bit in the LCDC register, which provide the overall

LCD enable/disable function, will only be effective when the device is in the Normal, Slow or Idle

Mode. If the device is in the Sleep Mode then the display will always be disabled. Bits RSEL0 and

RSEL1 in the LCDC register select the internal bias resistors to supply the LCD panel with the

correct bias voltages. A choice to best match the LCD panel used in the application can be selected

also to minimise bias current. The TYPE bit in the same register is used to select whether Type A or

Type B LCD control signals are used.

The LCDO register is used to determine if the output function of display pins are used as segment

drivers or CMOS outputs or I/O pins. The bits LCDSEL2~LCDSEL0 in the CTRL2 register are

used to select LCD Clock Source.

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