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HT66F13 датащи(PDF) 69 Page - Holtek Semiconductor Inc |
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HT66F13 датащи(HTML) 69 Page - Holtek Semiconductor Inc |
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69 / 173 page ![]() TM0AL Register Bit 76543210 Name D7 D6 D5 D4 D3 D2 D1 D0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 00000000 Bit 7~0 TM0AL: TM0 CCRA Low Byte Register bit 7 ~ bit 0 TM0 10-bit CCRA bit 7 ~ bit 0 TM0AH Register Bit 76543210 Name ¾¾¾¾¾¾ D9 D8 R/W ¾¾¾¾¾¾ R/W R/W POR ¾¾¾¾¾¾ 00 Bit 7~2 Unimplemented, read as ²0² Bit 1~0 TM0AH: TM0 CCRA High Byte Register bit 1 ~ bit 0 TM0 10-bit CCRA bit 9 ~ bit 8 TM0C0 Register Bit 76543210 Name T0PAU T0CK2 T0CK1 T0CK0 T0ON T0RP2 T0RP1 T0RP0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 00000000 Bit 7 T0PAU: TM0 Counter Pause Control 0: run 1: pause The counter can be paused by setting this bit high. Clearing the bit to zero restores normal counter operation. When in a Pause condition the TM will remain powered up and continue to consume power. The counter will retain its residual value when this bit changes from low to high and resume counting from this value when the bit changes to a low value again. Bit 6~4 T0CK2~T0CK0: Select TM0 Counter clock 000: f SYS/4 001: f SYS 010: f H/16 011: f H/64 100: f TBC 101: undefined 110: TCKn rising edge clock 111: TCKn falling edge clock These three bits are used to select the clock source for the TM. Selecting the Reserved clock input will effectively disable the internal counter. The external pin clock source can be chosen to be active on the rising or falling edge. The clock source f SYS is the system clock, while fH and f TBC are other internal clocks, the details of which can be found in the oscillator section. Bit 3 T0ON: TM0 Counter On/Off Control 0: Off 1: On This bit controls the overall on/off function of the TM. Setting the bit high enables the counter to run, clearing the bit disables the TM. Clearing this bit to zero will stop the counter from counting and turn off the TM which will reduce its power consumption. When the bit changes state from low to high the internal counter value will be reset to zero, however when the bit changes from high to low, the internal counter will retain its residual value. If the TM is in the Compare Match Output Mode then the TM output pin will be reset to its initial condition, as specified by the T0OC bit, when the T0ON bit changes from low to high. Rev. 1.10 69 February 9, 2011 HT66F13/HT66F14/HT66F15 Enhanced A/D Flash Type MCU |
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