AT89LP51 datasheet(5/113 Pages) ATMEL

5 / 113 page

3709B–MICRO–12/10

AT89LP51/52 - Preliminary

P2.3

I/O

P2.3: I/O Port 2 bit 3.

A11: External memory interface Address bit 11.

P2.4

I/O

P2.4: I/O Port 2 bit 5.

A12: External memory interface Address bit 12.

P2.5

I/O

P2.5: I/O Port 2 bit 5.

A13: External memory interface Address bit 13.

P2.6

I/O

P2.6: I/O Port 2 bit 6.

A14: External memory interface Address bit 14.

P2.7

I/O

P2.7: I/O Port 2 bit 7.

A15: External memory interface Address bit 15.

P4.5

I/O

P4.5: I/O Port 4 bit 5.

PSEN: External memory interface Program Store Enable (active-low).

P4.4

I/O

P4.4: I/O Port 4 bit 4.

ALE: External memory interface Address Latch Enable.

Not internally connected

POL

POL: Reset polarity (See “External Reset” on page 32.)

P0.7

I/O

P0.7: I/O Port 0 bit 7.

AD7: External memory interface Address/Data bit 7.

P0.6

I/O

P0.6: I/O Port 0 bit 6.

AD6: External memory interface Address/Data bit 6.

P0.5

I/O

P0.5: I/O Port 0 bit 5.

AD5: External memory interface Address/Data bit 5.

P0.4

I/O

P0.4: I/O Port 0 bit 4.

AD4: External memory interface Address/Data bit 4.

P0.3

I/O

P0.3: I/O Port 0 bit 3.

AD3: External memory interface Address/Data bit 3.

P0.2

I/O

P0.2: I/O Port 0 bit 2.

AD2: External memory interface Address/Data bit 2.

P0.1

I/O

P0.1: I/O Port 0 bit 1.

AD1: External memory interface Address/Data bit 1.

P0.0

I/O

P0.0: I/O Port 0 bit 0.

AD0: External memory interface Address/Data bit 0.

VDD

Supply Voltage

Not internally connected

P1.0

I/O

P1.0: I/O Port 1 bit 0.

T2: Timer 2 External Input or Clock Output.

P1.1

I/O

P1.1: I/O Port 1 bit 1.

T2EX: Timer 2 External Capture/Reload Input.

P1.2

I/O

P1.2: I/O Port 1 bit 2.

P1.3

I/O

P1.3: I/O Port 1 bit 3.

P1.4

I/O

P1.4: I/O Port 1 bit 4.

Table 1-1.

AT89LP51/52 Pin Description

Pin Number

Symbol

Type

Description

TQFP

PLCC

PDIP

VQFN

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