AT89LP51 datasheet(86/113 Pages) ATMEL

86 / 113 page

3709B–MICRO–12/10

AT89LP51/52 - Preliminary

implements mode 2 and also blocks reads from the code and data memories; however, reads of

the User Signature Array, Atmel Signature Array, and User Configuration Fuses are still allowed.

The Lock Bits will not disable FDATA or IAP programming initiated by the application software.

17.7

User Configuration Fuses

The AT89LP51/52 includes 10 user fuses for configuration of the device. Each fuse is accessed

at a separate address in the User Fuse Row as listed in Table 17-5. Fuses are cleared by pro-

gramming 00h to their locations. Programming FFh to a fuse location will cause that fuse to

maintain its previous state. To set a fuse (set to FFh) the fuse row must be erased and then

reprogrammed using the Fuse Write with Auto-erase command. The default state for all fuses is

FFh.

Table 17-4.

Lock Bit Protection Modes

Program Lock Bits (by address)

Mode

00h

01h

02h

Protection Mode

FFh

No program lock features

200h

FFh

Further programming of the Flash is disabled

300h

00h

FFh

Further programming of the Flash is disabled and verify (read) is also disabled

00h

Further programming of the Flash is disabled and verify (read) is also disabled;

External execution above 4K/8K is disabled

Table 17-5.

User Configuration Fuse Definitions

Address

Fuse Name

Description

00 – 01h

Clock Source – CS[0:1](2)

Selects source for the system clock:

CS1

CS0

Selected Source

FFh

High Speed Crystal Oscillator (XTAL)

FFh

00h

Low Speed Crystal Oscillator (XTAL)

00h

FFh

External Clock on XTAL1 (XCLK)

00h

Internal Auxiliary Oscillator (IRC)

02 – 03h

Start-up Time – SUT[0:1]

Selects time-out delay for the POR/BOD/PWD wake-up period:

SUT1

SUT0

Selected Time-out

00h

1 ms (XTAL); 16 µs (XCLK/IRC)

00h

FFh

2 ms (XTAL); 512 µs (XCLK/IRC)

FFh

00h

4 ms (XTAL); 1 ms (XCLK/IRC)

FFh

16 ms (XTAL); 4 ms (XCLK/IRC)

04h

Compatibility Mode

FFh: CPU functions in 12-clock Compatibility mode

00h: CPU functions is single-cycle Fast mode

05h

ISP Enable(3)

FFh: In-System Programming Enabled

00h: In-System Programming Disabled (Enabled at POR only)

06H

User Signature Programming

FFh: Programming of User Signature Disabled

00h: Programming of User Signature Enabled

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