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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PCF2123TS датащи(PDF) 7 Page - NXP Semiconductors |
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PCF2123TS датащи(HTML) 7 Page - NXP Semiconductors |
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7 / 55 page  PCF2123_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 4 December 2009 7 of 55 NXP Semiconductors PCF2123 SPI Real time clock/calendar 9.1.2 Power consumptions with respect to timer mode Four source clocks are possible for the timer. The 4.096 kHz source clock will add the greatest part to the power consumption. The selection of 64 Hz, 1 Hz or 1 ⁄ 60 Hz will be almost indistinguishable and add very little. Configuration: CLKOUT disabled, VDD = 3 V, timer clock set to 1⁄60 Hz. (1) IDD (nA) minimum power mode. (2) Maximum value for RS is 100 kΩ. Fig 6. IDD with respect to quartz RS Rs(2) (k Ω) 0 100 80 40 60 20 001aai558 130 170 90 210 250 IDD(1) (nA) 50 Configuration: CLKOUT disabled, quartz RS =15kΩ. (1) IDD (nA) minimum power mode. (2) Timer clock = 4 kHz. (3) Timer clock = 64 Hz, 1 Hz, 1 ⁄60 Hz. Fig 7. IDD with respect to timer clock selection VDD (V) 0 6 4 2 001aai559 200 100 300 400 IDD(1) (nA) 0 (2) (3) |
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